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AURIX™ Forum Discussions

KhanhLe
AURIX™
Hello, I have a problem and need to be supported 🙂 Problem: We use PWM to control the motor and the PWM duty will be updated by ISR every 125ms and w... Show More
Translation_Bot
AURIX™
Hello,everyone,I have a KIT_AURIX_TC297_TFT evaluation board, I have programmed UART_VCOM_1_KIT_TC297_TFT demo into it, follow Infineon-AURIX_TFT_Trai... Show More
Translation_Bot
AURIX™
TC399
solved msg Solved
We would like to know if Infineon TC399 SDK has any software library support for PMSM motor speed control? For example, are there any libraries that p... Show More
Translation_Bot
AURIX™
  How can I sample a channel using DMA, and I interrupt the channel to dma, so that all channels of a group will trigger DMA move, but I only want one... Show More
Translation_Bot
AURIX™
hello. I am currently using a TC375 series chip, and I can see in the ASCLIN SPI mode about the half-duplex feature, but in the actual use, I found th... Show More
Translation_Bot
AURIX™
Hi all, I have a KIT_AURIX_TC297_TFT board, when I use ads to import a project and create a new project based on the tc297, there is no active-debug o... Show More
azeemhad
AURIX™
If i purchase KIT_A2G_TC399_5V_TRB_S HW then 1) Will it have the Chip SAK-TC399XE-256F300S BD, mounted on it? OR2) What chip (give me full name) , wil... Show More
khaledhassan
AURIX™
For STM and NXP, in IDE IAR and MCUExpresso they have different plug-in/feature to configure the clock. How to do it for Infineon using Aurix? Is ther... Show More
User21646
AURIX™
Hi thereI'm new to triCore microcontrollers. I am going to develop an application with SAKTC1724 microcontrollers. I don't know how to get started wit... Show More
khaledhassan
AURIX™
Hi, https://community.infineon.com/t5/AURIX/Cannot-get-CAN-to-transmit-and-receive-on-same-node-externally-with-TC375-shield/td-p/443013 Above example... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs