Hi,

I want to try out the phase shift full bridge control with the following three features.
Can you provide me with a sample or method to simply check them?


1. Outputs 8 channels of pwm

　We think it is possible to add the ATOM channel of the previously tried sample.
　Do you have any concerns when considering No. 2 and 3?

　*https://www.infineonforums.com/threa...tion-Kit-TC3x7




2.Output the pwm inversion signal.

　I think it's possible to achieve this by using a dead-time module.
　Is there sample code available for reference to use the DTM?



3.Output phase-shifted pwm

　The CCU6 would make this happen, but there are only three units, CC60-CC62.
　If you want to combine No.1 and 2 to achieve this with 4 phase x 2 channels, could you please tell me how to achieve the same function with GTM?　



Thanks, Show Less

Hi,

I had a couple of queries on understanding the memory map file for TC297TF. I have attached a part of the map file for the discussion.

1. In line no. 1006 of map file i.e SomeIpXf_Com_SystemSignal_StructWithinStruct_array [ustack_tc0:16,16]
Does it mean the API - "SomeIpXf_Com_SystemSignal_StructWithinStruct_array" uses 16 Bytes of stack ?

2. In line no. 1006 of map i.e SomeIpXf_Com_SystemSignal_StructWithinStruct_array [ustack_tc0:16,16], the call graph is as follows :

+-- SomeIpXf_Com_SystemSignal_StructWithinStruct_array [ustack_tc0:16,16]
| |
| +-- SomeIpXf_LSBtoMSB *
| |
| +-- SomeIpXf_AppendHeaderSR *

But in actual code, SomeIpXf_AppendHeaderSR is called before SomeIpXf_LSBtoMSB . Why is this not observed in the call graph?

3. In line no. 938 of map, SomeIpXf_Inv_Com_SystemSignal_U32_Deserialize [ustack_tc0:8,8]
In the Trace32 debugger [image_1 in attachment], the SP (stack pointer) goes up to +04 (in bytes = 4 ). So my assumption is, this particular API is consuming 4 bytes. But in the map file, it shows as
SomeIpXf_Inv_Com_SystemSignal_U32_Deserialize [ustack_tc0:8,8] i.e 8 Bytes of Stack usage. Why is such discrepancy ? Show Less

Hi everyone,
Am trying to run the demo code of Ethernet on TC234 with the help of Aurix Free tricore entry toolchain. For this I have downloaded the latest version of Infineon Demo code, ehich is of version 9. and basic software framework of version "SWFramework_3v1r0_p1".

The problem which am facing is that after debugging the code in UDE the programme is getting stuck in "debugging memory" i.e. "asm ::: memory" part, it's not printing the output as shown in PDF of migrating the software.
The UDE is stuck in this function of IfxCpu_IntrinsicsGnuc.h the code is

 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
 assembly instructions.
 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
 * \{
 */

/** Insert DEBUG instruction
 */
IFX_INLINE void Ifx__debug(void)
{
    __asm__ volatile ("debug" : : : "memory");
} [\CODE]

There are some changes which I have done for the programm to build the "elf" file in CMD, the changes are done in port mapping of "ethdemo.c"

void EthDemo_init(void)
{
    /* configure Ethermac */
    {
        const IfxEth_RmiiPins pins = {
            &IfxEth_CRSDVA_P11_11_IN,
            &IfxEth_REFCLK_P11_12_IN,
            &IfxEth_RXD0A_P11_10_IN,
            &IfxEth_RXD1A_P11_9_IN,
            &IfxEth_MDC_P21_2_OUT,
            &IfxEth_MDIO_P21_3_INOUT,
            &IfxEth_TXD0_P11_3_OUT,
            &IfxEth_TXD1_P11_2_OUT,
            &IfxEth_TXEN_P11_6_OUT
        };


The code in BOLD are my changes.

Show Less

Hi,
I used to coding Aurix MCU in ADS, which is a simple version of tasking, and the program works ok. Now i applied for a license of tasking, and migarated the program to tasking IDE，
then an error occured in linking"ltc E123: section ".data.Cpu0_Main.Int_Timer_Cnt" (variable Int_Timer_Cnt) requires initialization code in task "task1" for symbol "_lc_ub_table"". "Int_Timer_Cnt" is just a global variable,
and the other global variables make out the same error too when "Int_Timer_Cnt" was commented. So what the initialization code in task mean? i don't think it's the initialization code that follow after _START。anyone can help me to solve it?
Thanks! Show Less

Hi all!

In the university my professor ordered 15-20 Aurix TFT Board and I got one to play as well. First of all I wasn't able to debug it powered from USB. (Windows installed Macbook pro 2013)
Anyways then I found and adapter and was able to debug. And as you can guess I have lost demo software. Demo software has many components and it looks really comprehensive application.
I wanted get the source code but couldn't find it anywhere. Can we get that demo app source code somehow? It is shown in the below link as well. Hope to hear good soon.

cheers,



https://www.youtube.com/watch?v=Z7l6b4VVC8M Show Less

[aurix TC377; iLLD_1_0_1_13_0__TC37A; tasking IDE]

I am implementing the SPI by relying on the IfxQspi_SpiMaster_initChannel, IfxQspi_SpiMaster_initModule, and IfxQspi_SpiMaster_exchange functions.
It works regularly but I have seen that every sending / receiving of data is done using:
SpiIf_Status IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel * chHandle, const void * src, void * dest, Ifx_SizeT count)
where I have to specify the send buffer, the receive buffer and the length.
I have to read the data from an ATMEL memory and I have to send a page read command (0xD2) followed by 3 bytes that identify the address to be read, and finally by many DUMMY bytes equal to the number of bytes I have to receive
The atmel, for the first 4 bytes (command reception phase) returns 0xFF, then starts with the actual data.
So if I have to receive 256bytes I have to prepare a send buffer of 260byte (with the first 4 filled in with the command and address) and a reception buffer of another 260byte (in which the first 4 bytes must be filled with 0xFF and then they will start the data)
If the page I was supposed to read had to be inserted into a 256byte array it forces me to make another copy by taking only the good data from the receive buffer and copying it back into my array.

It seems to me a little optimized procedure ...

The alternative could be to break the command into 2: one for the command and one for receiving the data, but to do this I have to give up the automatic CS management because otherwise at the end of the first command the CS is disabled by interrupting the procedure.

Is this really the case or is there some alternative way that I have not identified?

Thank you in advance. Show Less

Hi all

I'm trying to figure out how the Cache Ram and Tag cache Ram is intended to work. (Program Cache TAG RAM, Data Cache TAG Ram, Data Cache ram etc). There is some reference?

These RAM section are automatically used by the uC or need to be explicitily "invoked" into the code/linker?

Br
Francesco Show Less