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AURIX™ Forum Discussions

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User19757
AURIX™
Hi,I want to try out the phase shift full bridge control with the following three features.Can you provide me with a sample or method to simply check ... Show More
User22282
AURIX™
Hello!I am trying to rewrite my code from other MCU to TC234. And when i try to cast Can bus data to (uint16_t) like this:- uint16_t var = *(uint16_t*... Show More
User21707
AURIX™
Hi,I had a couple of queries on understanding the memory map file for TC297TF. I have attached a part of the map file for the discussion.1. In line no... Show More
User17612
AURIX™
Hi, before flashing a BMHD into AURIX, I want to be sure, that I use the correct CRC values inside BMHD. How do I calculate the CRC for a BMHD in AURI... Show More
User16330
AURIX™
Hi everyone,Am trying to run the demo code of Ethernet on TC234 with the help of Aurix Free tricore entry toolchain. For this I have downloaded the l... Show More
User19708
AURIX™
Hi, I used to coding Aurix MCU in ADS, which is a simple version of tasking, and the program works ok. Now i applied for a license of tasking, and ... Show More
apeter
AURIX™
Hi all,We are using the AURIX TC27xD for our project.We have integrated the hitex SafeTlib and it works on Power-on, however after a Soft reset (Syste... Show More
User18435
AURIX™
Hi all!In the university my professor ordered 15-20 Aurix TFT Board and I got one to play as well. First of all I wasn't able to debug it powered from... Show More
IvanoBono
AURIX™
[aurix TC377; iLLD_1_0_1_13_0__TC37A; tasking IDE]I am implementing the SPI by relying on the IfxQspi_SpiMaster_initChannel, IfxQspi_SpiMaster_initMod... Show More
FD_aurix
AURIX™
Hi allI'm trying to figure out how the Cache Ram and Tag cache Ram is intended to work. (Program Cache TAG RAM, Data Cache TAG Ram, Data Cache ram et... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs