AURIX™ Forum Discussions

Hi,

Im trying to use a SQPI module in slave mode in order to receive 3 bytes of data. But the data that ends up in the RX FIFO seems to be shifted right by a different amount of bit every time.

Heres my testing setup: im using QSPI3 as master and QSPI4 as receive-only slave, they are connected accordingly (Chip-Select, Clock, MOSI). I copy the data I want to send (0xFFFF0F [0b111111111111111100001111]) into QSPI3s DATAENTRY and the BACON values I want to use into its BACONENTRY using DMA. When QSPI4 triggers an RX interrupt, one entry (32 bits) will be copied out of QSPI4s RXEXIT using DMA.
I think I configured QSPI4 correctly: setting GLOBALCON und GLOBALCON1, resetting state machine and FIFOs using GLOBALCON.B.RESETS, setting BACON to the same values I use for QSPI3, putting some data into DATAENTRY to make the module apply the values from BACONENTRY into BACON, configuring timings in ECON and lastly entering slave mode by setting GLOBALCON.B.MS = 0x2

When I now send these 3 bytes using QSPI3: 0xFFFF0F (0b111111111111111100001111)
i would expect QSPI4 to receive the exact same data. But instead i would get the data but shifted right. Here are the first few receptions:
0b00000000111111111111111100001111,
0b00000000111111111111111110000111,
0b00000000111111111111111111000011,
0b00000000111111111111111111100001,
0b00000000111111111111111111110000,
0b00000000111111111111111111111000.
It seems like with every transmission the data gets shifted right by one more bit.
I also get a SLSI misplaced inactivation error in ERRFLAGS in QSPI4s STATUS register, but the SLSI signal looks fine to me an on oscilloscope and Im using the same ECON and BACON settings for both modules so the SLSI misplaced inactivation error really should not be happening

Does anyone know what could be causing this?

Here are all the configuration parameters i use for both modules:

GLOBALCON:
TQ = 63
SI = 0
EXPECT = 0xF
LB = 0
DEL0 = 0
STROBE = 0
SRF = 0
STIP = 0
EN = 1
MS = 0
AREN = 0
RESETS = 0

GLOBALCON1:
ERRORENS = 0
TXEN = 0
RXEN = 1
PT1EN = 0
PT2EN = 0
USREN = 0
TXFIFOINT = 0
RXFIFOINT = 0
PT1 = 0
PT2 = 0
TXFM = 1
RXFM = 2

BACON:
LAST = 1
IPRE = 5 (PRESCALER 1024)
IDLE = 1
LPRE = 0 (PRESCALER 1)
LEAD = 1
TPRE = 0 (PRESCALER 1)
TRAIL = 1
PARTYP = 0
UINT = 0
MSB = 1
BYTE = 0
DL = 23
CS = 0

ECON:
Q = 32
A = 0
B = 0
C = 1

Hello everyone!

I am currently trying to implement SENT protocol message receiving into my project. As there are no example codes for SENT on Github, it is really hard to figure it out. I am using the TC375LK.

As I went through the iLLD's "How to use the SENT Interface driver?" I copied everything from there, just changed the pins to the one, I connected the Vector interface to (IfxSent_SENT0A_P40_0_IN).
However, when I am sending  SENT messages from the Vector VN1640A via CANoe, there are no interrupts that are generated on the Aurix microcontroller (as can be seen from the debugger). My guess is that in the iLLD there is the interrupt "installation" part:

Hello All,

We are trying to configure 500k baud for bit rate and 5M baud for Data rate FD but we get stuff error.

250k with 1M baud and 500k with 2M baud configurations work fine. 

We have double checked the Seg1 Seg2 and SJW values and also tried multiple combinations but no luck.

Attaching the Logic analyzer screenshots for 250k with 1M baud and 500k with 2M bauds are attached for reference.

Best Regards,

Kamran Pathan

Hi, 

Can we perform synchronization parallel conversion together(at a time) for both primary and secondary clusters? For TC37x?

Primary- G0_CH0,G1_CH0,G2_CH0,G3_CH0

Secondary- G8_CH0,G9_CH0,G10_CH0,G11_CH0

Hello,

I am new to development with an AURIX MCU and its microarchitecture specialties and would thus have quiet simple questions : What could be all communication paths that be programmed between CPU0, NVM, RAM and peripherals ? Your response would help me understand which of the interim units and modules are more essential bricks than others, in order to study them first / if they are worth studying first as introduction and afterwards focus on additional/complementary functions among DMU, LMU, PFI, FSI, LMU, DMA, PSPR, DSPR, DFRWB, PFRWB, DPI, PMI, etc. I am sorry If it is a so beginner question.

Thanks in advance for your support.