AURIX™ Forum Discussions

Hi，

I am new to programming and recently wanted to learn about BootLoader. I met a lot of doubts in the process of learning.

I read chapter 4 of the TC275 user's manual, but I didn't know how to use it in my projects. I did some research and learned that I needed to resort to.lsl files, but I didn't know how it worked.

What knowledge should I have if I want to learn BootLoader of TC275 systematically and comprehensively? What materials/documents should I refer to? Finally, how do I get these documents?

Looking forward to your advice, thank you！

Hello all.

I am working in a project based on a TC38xx Aurix processor and using as compiler the HighTec GNU C-compiler. The unit test framework chosen is Tessy. To generate a test driver the startup code for the embedded microcontroller is 
required by Tessy.

Tessy can use the object files for the startup code generated in the target development project or compile the sources for the startup code. Also the linker file is required.

I have installed the Aurix Development Studio. I have downloaded and built the project https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/Multicore_1_KIT_TC387_TFT.

• I assume the startup code files are cstart.c, cstart_tcx.c and sync_on_halt.c. Is this correct? Where can I find these files for the TC38xx? 
• Within the example project from the Infineon Git Hub I can find a sync_on_halt file in the debug folder but no cstart. Instead there are Ifx_Ssw_Tcx.c files in the Infra library which are described as startup code. Are these Ifx_Ssw_Tcx.c plus the sync_on_halt the startup files I would need for the test driver for the processor TC38x/HighTec compiler configuration? In the Aurix Development Studio I see Debug(TASKING) so I understand the compiler there used is from Tasking. Does the ADS need a board support library to be linked while the rest of the startup code?
• For the moment we would only need the Core0 active. Would it then be enough to have the files related to core0? How could the other cores be disabled? Is there any compiler option for that?
• For the linker file I have selected in the ADS the Lcf_Gnuc_Tricore_Tc.lsl.

Another point to take into account is that Tessy does not support Watchdog or Interrupts so both must be disabled. How can I do this in the ADS project?

Thanks in advance for your comments.

Hi Support,

I'm using TC364 as uC, and I find that not all valid flag(VF) bits in register GxRESDy (x=0-11;y=0-15) of EVADC can be set 1 even if I can see the RESULT value updated as below. Is there any condition to set the valid flag? Thank you

Hi,

l was using TC334.  l used DMA channel 1 for spi send, channel2 for spi recieve.  l triggled ADC  sampling through CCU6  T13 timer.  And l put my spi sending  function  into ISR_ADC_Group1result.  l do not want other interrupt handler  was interrupt by DMAChn2ISR.  So l set a lower  priority to DMAChn2ISR. lt is  3.

And the procedure wiil not run into DMAChn2ISR. Everything is ok when l set  DMAChn2ISR to 123. And l wanna know why the lower priority interrupt was not  executed.

Hi All, When I try to connect my TC337 board using micro usb, i am seeing driver unavailable error as below image

Hi 

I am new to the AURIX platform & looking for a way to trigger I2C Read/Write functionality using interrupts as a requirement. Any idea how to implement the same in TC397  Application kit (part no - KITA2GTC3975VTFTTOBO1)? Are there any HAL APIs for the same? 

Right now I2C R/W is implemented in polling mode & I intend to stop blocking the CPU hence trying to make this operation interrupt based.

FYI I am writing the code in AURIX studio. Any help/guidance would be appreciated.

Thanks in advance

label showing "sample" and "ATTN :"

Not sure if it will impact the production use/engineer sample or not.
Since we're afraid that it is parts. and technical spec is not the same as normal production parts or for specific person only.

Could you please help to confirm?

Thanks.