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AURIX™ Forum Discussions

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RajeshVit
AURIX™
How many full CAN messages doesTC333 controller support on 1 CAN node . We need to configure 130 CAN messages for the ECU . ECU communicates in the CA... Show More
User17092
AURIX™
Hi Support team,On DAP module TSv2.3, CRC-6 algorithm is not correct on section 1.8.3. We cannot get correct CRC value for transmitting packets. The r... Show More
User9635
AURIX™
Hello Support,Shown below is a snippet from TRAPSTAT register Bit 2 .Can you please tell me what is the source for this TRAP2?What configuration does ... Show More
User17900
AURIX™
Hi, I am working on establishing data communication between Tc233 (Aurix workspace, Infenion make, SLAVE) and CC26R1F (CCS workspace, TI make, MASTER)... Show More
User22805
AURIX™
Alarm configuration:SMU_AG10CF2 = 1SMU_AG10CF1 = 1SMU_AG10CF0 = 0to forward a reset request to SCUTriggering Alarm:Once the error condition is true we... Show More
Jamber
AURIX™
In TC377, what's the problem with DMA and CPU access a same SRAM at the same time? For example, during CPU reading a variable DMA moves a data to the ... Show More
User18904
AURIX™
Hello,I would like to confirm if my understanding is correct about SAHMEM window usage for Aurix 2G HSM.1) Is it correct to write that HSM writes host... Show More
nsyed
AURIX™
I trying to enable STM MCAL module (V10.40.0 Autosar Version 4.2.2) in my EBTresos MCAL project for TC3777. The configuration is successful and I can... Show More
User15256
AURIX™
Dear all,After searching the pros and cons of Lauterbach and UDE PLS debuger, I could not find a huge difference.For you, which is the best debuger an... Show More
kv193
AURIX™
Hello.I success learn and transfer to my board example from github "SPI_DMA_1_KIT_TC397_TFT".Now I need change (adjust) timing parameters as LEAD, LPR... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs