AURIX™ Forum Discussions
How many full CAN messages doesTC333 controller support on 1 CAN node . We need to configure 130 CAN messages for the ECU . ECU communicates in the CAN network via only 1 channel
Show LessOn DAP module TSv2.3, CRC-6 algorithm is not correct on section 1.8.3. We cannot get correct CRC value for transmitting packets. The result of function GetCrc cannot pass CRC Check at all.
Does anyone report similar issue?
Thanks! Show Less
Shown below is a snippet from TRAPSTAT register Bit 2 .
Can you please tell me what is the source for this TRAP2?
What configuration does set this Bit TRAP2?
Please provide some section number from the User Manual where TRAP2 is described.
Best Regards Show Less
Hi,
I am working on establishing data communication between Tc233 (Aurix workspace, Infenion make, SLAVE) and CC26R1F (CCS workspace, TI make, MASTER).
CC2652R1 - (MASTER) is sending 57 bytes of data.
But only 16 bytes of data is being received at the TC233 - (SLAVE) side, as the maximum SPI Receive Buffer size is 16 bytes.
Is there any way to clear the buffer and again receive next 16 bytes? or any other way to receive 57 bytes of data in TC233?
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SMU_AG10CF2 = 1
SMU_AG10CF1 = 1
SMU_AG10CF0 = 0
to forward a reset request to SCU
Triggering Alarm:
Once the error condition is true we are doing the below things
1. Check the state of SSM is in Run or Fault
2. Verifies the alarm is triggered from alarm group dedicated for SW alarm (in our case Alarm 10)
3. Writes the below value in the CMD registers
CMD = 0x06 (SMU_Alarm)
ARG = Alarm 10 (from Alarm Grp 10)
Problem: SW breakpoints hits function to set the alarm status (i.e SW can trigger Alarm) but not able to forward reset request to SCU
Question: Could you please let me know on whether anything further need to be configured?
Also, it would be helpful if you can check that whether am I following correct steps to trigger alarm upon error and forward the reset request to SCU
Thanks for your time in advance Show Less
In TC377, what's the problem with DMA and CPU access a same SRAM at the same time? For example, during CPU reading a variable DMA moves a data to the variable, or during DMA moving a data to a variable CPU reads it, what will happend in this case?
Show LessI would like to confirm if my understanding is correct about SAHMEM window usage for Aurix 2G HSM.
1) Is it correct to write that HSM writes host base address in SAHBASE at address 0xF00400C0 and then HSM reads or writes data at address 0xF005xxxx?
(For example if last 64k of DSPRAM is reserved and HSM wants to access 5th word, HSM writes 0xD0020000 in SAHBASE and reads or writes at address 0xF0050010?)
2) Is there a mechanism to handle simultaneous access by Host and HSM? (with the example : Host writes at address 0xD0020010 and HSM reads at address 0xF0050010?)
Thanks. Show Less
ctc E219: ["C:\MCAL\MC-ISAR_AS42x_TC3xx_1.40.0\DemoWorkspace\McalDemo\TC37A\0_Src\AppSw\Tricore\DemoMcal\Demo_Irq\Stm_Irq\Stm_Irq.c" 43/1] cannot open #include file "DemoApp_Cfg.h"
ctc E219: ["C:\MCAL\MC-ISAR_AS42x_TC3xx_1.40.0\DemoWorkspace\McalDemo\TC37A\0_Src\AppSw\Tricore\DemoMcal\Demo_Irq\Stm_Irq\Stm_Irq.c" 59/1] cannot open #include file "Test_Time.h"
ctc E219: ["C:\MCAL\MC-ISAR_AS42x_TC3xx_1.40.0\DemoWorkspace\McalDemo\TC37A\0_Src\AppSw\Tricore\DemoMcal\Demo_Irq\Stm_Irq\Stm_Irq.c" 67/1] cannot open #include file "Test_Stm_Irq.h"
ctc E207: ["C:\MCAL\MC-ISAR_AS42x_TC3xx_1.40.0\DemoWorkspace\McalDemo\TC37A\0_Src\AppSw\Tricore\DemoMcal\Demo_Irq\Stm_Irq\Stm_Irq.c" 129/1] syntax error - token "&" deleted
I am using Tasking compiler. Any thoughts on this error ? I hand-edited the file and I tried to remove the #includes, but I am still running into “Stm_Irq.c" 129/1] syntax error - token "&" deleted” error.
Any help on this issue will be greatly appreciated
After searching the pros and cons of Lauterbach and UDE PLS debuger, I could not find a huge difference.
For you, which is the best debuger and why? Show Less
I success learn and transfer to my board example from github "SPI_DMA_1_KIT_TC397_TFT".
Now I need change (adjust) timing parameters as LEAD, LPRE and SCLK polarity.
If I write in user space init code
qspi->BACON.U = value;
I got TRAP error in debugger and not change value in register.
I try use function IfxQspi_SpiMaster_writeBasicConfiguration(&Qspi.spiMaster, value);with the same result.
What is my mistake? Is there example for this case? Show Less