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AURIX™ Forum Discussions

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User21179
AURIX™
I was analysing the difference in peripherals between TC387QP and TC389QP. After going through the data sheet, user manual and variants document of TC... Show More
User22172
AURIX™
I am getting error while accessing some uninitialized code memories from range of 0x8000 0000 to 0x801f 0000.This memory is divided as 64k block each ... Show More
User21934
AURIX™
I am working with a TC377 Aurix microcontroller. I want to use the MCS processor core within the GTM to access some timer registers within the same c... Show More
User17900
AURIX™
Hi, We need to start the conversion of ADC at rising edge of PWM pulse (GTM-TOM). I try to refer in user manual it says "GTM ADC Trigger 0, Trigg... Show More
User22183
AURIX™
Hello Everyone,Can anyone give the support for how to use TPM for storing the secure boot keys in imx6/imx8 series platforms. All the suggestions are ... Show More
User21730
AURIX™
Hello All,Please I need your help on starting developing a Test software in TC233, 1. I have to MyICP documentation.2. I have installed Free TriCore E... Show More
User17842
AURIX™
Hello everyone! I have just started learning embedded programming. So far, I practiced using Atmel microprocessors and recently I got Aurix starter ki... Show More
User19600
AURIX™
Hello,I have two questions regarding TSIM :1. Does TSIM support loading of multiple ELF files ?2. Where can we find the documentation for the TSIM API... Show More
User22033
AURIX™
Hello,I would be very grateful for an explanation on how the access to CSFR via the XBAR is realized?This is the only Information I could find in the ... Show More
User20162
AURIX™
Hi, I am trying GTM based PWM generation, i want to sync the Tom 0 and Tom 1 clock to get rising and falling edge of all pulses should be same.how can... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs