AURIX™ Forum Discussions
On a TC37x evaluation board, I am trying to write on the PFLASH1 while executing from the CPU0. I can write without any problem on PFLASH0, but writing on PFLASH1 always results in a Data Asynchronous Error. Is there any way to get it working ? Or it is just not possible ?
I use a lot of AURIX MCU and HSM.
I currently need HSM Reset.
I couldn't find any explanation about HSM Reset in manuals.
How can I only reset HSM (Arm Cortex)?
< I already know HOST Reset, I need to reset only HSM>
I have recently started working with TC387 and have been struggling to understand some points regarding the ‘groups’ in EVADC. I have gone through the user manual and the example projects but did not find anything related to the issue in them.
I am looking for some help in understanding the following behavior:
If any channel of a group is configured as a slave conversion source and I want to use the same group (different channel) for another ADC measurement, then this new input must also be configured as a slave source. If I configure the new input as queueMaster then the adc output for the channel configured as slave, reads 0. The valid flag is always 0 for it.
If I change the conversion source for the new input to slave, then both inputs work as expected.
If you need any additional information, please let me know.
Thanks! 😊Show Less
I want to configure CAN module in TC399 Micro-Controller,
I want to use same node for transmit and receive, I configured the transmit part, but in reception part i am facing issue,
receive interrupt is not generating, can you share me any example code for this , i want to generate the interrupt for Receive in same node.
Standby Mode is performed with TC3xx, and Wakeup is considered using CAN.
Do I need to use SCR to wakeup?
When CAN communication is detected by SCR, how to wakeup from SCR to TC3xx?
I don't know what to do.
1, CAN interrupt detection with SCR
2, Notify TX3xx with SCRINTEXCHG
3, Detect CAN notification by PMSWCR2.SCRINT on TC3xx side
4, After operation 3, reset the software
Are the above steps correct?
If correct, will the TC3xx be able to detect PMSWCR2.SCRINT because it is in Standby mode?
Please help me.Show Less
In the AURIX 2G, there is a register SCU_STCON -- Start-up Configuration Register -- Offset 0xC4.
Bit 15 is STP.
Following sentences are in the User Manual Part 1 Revision 1.4 for STP bit
This bit will be always set by FW and can't be reset.
This bit is also cleared by an Application Reset.
STP is automatically set when a shutdown trap occurs.
Looks like STP is cleared when Application Reset but during Cold Power On Reset it will be SET.
Is that correct?
FW -- means Boot_ROM Firmware which is SSW
Is that correct?
Can you please point me to documentation regarding "shutdown trap" as mentioned above?
Best Regards Show Less
I would like to understand the following :
The register STCON has access mode as ST, P0. P0 means a master can access it when accen bit is enabled.
1. I have opened the Trace32 and requested a Cold PORST. The execution in Trace32 is now at the start of the bootloader.
2. In this condition, I try to write 0 to this STP bit. But I get SPB bus error meaning the master(CERBERUS) cannot access it. The access enable bit for the master (here CERBERUS) is Enabled in SCU_ACCEN00/10.
If only SSW can write this bit, Why is then the access mode P0 given ? Is it possible to modify the value to 0 at any point ?Show Less
I am currently trying to provoke an application reset on core0 of TC367D using the IfxScuRcu_performReset(IfxScuRcu_ResetType_application, (UINT16)0x0000); function (I also tried with the example code from the Gitlab, but the result is the same).
Whenever I do that, the microcontroller gets stuck afterwards (during the reset I guess). Is there any way to attach to the running target to see what is happening ?
Can you please tell me if there is anything else to be done (the watchdogs have been previously disabled) ? Is there any specific state in which the other core should be when reseting? Any lead can be helpful !
Thank you !Show Less
I bought KIT_AURIX_TC237_TFT because I need to develop hsm solution.
I have read the hsm-startup manual.
And I have understood that hsm bootloader code need to be loaded into hsm code sector first.
But the manual doesn't descrbie how to load the hsm bootloader code.
I guess that i need to use my ude or t32 debugger.
But the KIT cannot be connected with any ude or t32 debugger...
I have already checked host core is connected with debuggers.
I'm in a hurry, right now.
Please help me.
I have a question about Aurix Development Studio.
After install the ADS, I can't debug due to debugger IO error.
So I tried to install the DAS64, but I can not install the DAS64 like below.
But I can not found the DAS64 program and folder in my program folder.
How to uninstall and install the DAS64 program.Show Less