Jan 06, 2020
08:57 PM
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Jan 06, 2020
08:57 PM
hello, aurix experts:
I have a problem about __syscall(0) during integrating freeRTOS
I found the definition in toolchains, as following:
#define __syscall(service) __tric_syscall (service)
#define __SYSCALL(service) __tric_syscall (service)
#define __tric_syscall(service) \
__asm__ volatile ("syscall "__STRINGIFY (service) ::: "memory")
static __inline__ __attribute__((__always_inline__))
void _syscall (const unsigned __service)
{
__asm__ volatile ("syscall %0" :: "i" (__service) : "memory");
}
In freeRTOS,the "portYIELD" is defined as __syscall(0)
how to understand the current task yeild cpu after "__syscall(0)"?
I found the instruction of "syscall" just raised a trap, so, I think the "0" is an ID of trap
but, I didn't find the definition about traps' id in Aurix document.
Is there any one would tell me how to understand "the current task yeild cpu after __syscall(0)"?
my mcu is tc297b
thank you very much
I have a problem about __syscall(0) during integrating freeRTOS
I found the definition in toolchains, as following:
#define __syscall(service) __tric_syscall (service)
#define __SYSCALL(service) __tric_syscall (service)
#define __tric_syscall(service) \
__asm__ volatile ("syscall "__STRINGIFY (service) ::: "memory")
static __inline__ __attribute__((__always_inline__))
void _syscall (const unsigned __service)
{
__asm__ volatile ("syscall %0" :: "i" (__service) : "memory");
}
In freeRTOS,the "portYIELD" is defined as __syscall(0)
how to understand the current task yeild cpu after "__syscall(0)"?
I found the instruction of "syscall" just raised a trap, so, I think the "0" is an ID of trap
but, I didn't find the definition about traps' id in Aurix document.
Is there any one would tell me how to understand "the current task yeild cpu after __syscall(0)"?
my mcu is tc297b
thank you very much
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- IFX
2 Replies
Jan 07, 2020
10:12 AM
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Jan 07, 2020
10:12 AM
Hi icework. The CPU details are covered in the TriCore Architecture Manual Volume 1:
https://www.infineon.com/dgdl/Infineon-TC2xx_Architecture_vol1-UM-v01_00-EN.pdf?fileId=5546d46269bda...
See 6.3.7 System Call on page 107. In your trap handler for Trap Class 6, register D15 holds the 8-bit argument from the SYSCALL instruction.
https://www.infineon.com/dgdl/Infineon-TC2xx_Architecture_vol1-UM-v01_00-EN.pdf?fileId=5546d46269bda...
See 6.3.7 System Call on page 107. In your trap handler for Trap Class 6, register D15 holds the 8-bit argument from the SYSCALL instruction.
Jan 07, 2020
06:16 PM
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Jan 07, 2020
06:16 PM
thank you very much
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