Jan 16, 2020
01:13 AM
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Jan 16, 2020
01:13 AM
Hi all,
Does anyone have an idea why am i getting 0xFF from the QSPI Rx register of AURIX™-TC2xx?
I am not sure if the receive SPI of AURIX™-TC2xx is not functioning properly or the other SPI device is not sent properly to AURIX™-TC2xx.
The other device is able to receive the data transmitted by AURIX™-TC2xx.
Kind regards
Lucas
#8042000 19467
Does anyone have an idea why am i getting 0xFF from the QSPI Rx register of AURIX™-TC2xx?
I am not sure if the receive SPI of AURIX™-TC2xx is not functioning properly or the other SPI device is not sent properly to AURIX™-TC2xx.
The other device is able to receive the data transmitted by AURIX™-TC2xx.
Kind regards
Lucas
#8042000 19467
- Tags:
- IFX
1 Reply
Jan 17, 2020
05:50 AM
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Jan 17, 2020
05:50 AM
Hi Lucas,
This is the correct behaviour of the SPI RXEXIT register. The RXFIFO has a property that a read access from an empty RXFIFO generates an underflow interrupt, and delivers only “1” bits, which overrules the reset value.
Therefore reading from a non initialized RXFIFO delivers all “1” and not all ”0”.
Best regards,
Mr. AURIX™
This is the correct behaviour of the SPI RXEXIT register. The RXFIFO has a property that a read access from an empty RXFIFO generates an underflow interrupt, and delivers only “1” bits, which overrules the reset value.
Therefore reading from a non initialized RXFIFO delivers all “1” and not all ”0”.
Best regards,
Mr. AURIX™