Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

Level 3
Level 3
First like received
Hi all,

Does anyone have an idea why am i getting 0xFF from the QSPI Rx register of AURIX™-TC2xx?
I am not sure if the receive SPI of AURIX™-TC2xx is not functioning properly or the other SPI device is not sent properly to AURIX™-TC2xx.
The other device is able to receive the data transmitted by AURIX™-TC2xx.

Kind regards

#8042000 19467
1 Reply
Level 5
Level 5
First solution authored First like received
Hi Lucas,

This is the correct behaviour of the SPI RXEXIT register. The RXFIFO has a property that a read access from an empty RXFIFO generates an underflow interrupt, and delivers only “1” bits, which overrules the reset value.
Therefore reading from a non initialized RXFIFO delivers all “1” and not all ”0”.

Best regards,