Which smu alarm is generated by pll and spb clock monitors?

[aurther]

Hi,

Am using Tc37x

For CCUCON3

If i enable PLL and SPB clock monitors and if the toggle check fails, then which SMU alarm is generated?

I am referring to this

Thank You

[Di_W · Accepted solution]

Hi aurther,

Please check T37x_appx_um_v2.0.pdf for below description.

dw

[aurther]

hi @Di_W 

I can only see alarms 0-11 in my debugger.

Are the alarms 20 and 21 -> standby alarms? because i cannot see in the debugger.

Plus for alarms 20 and 21 only fsp action is provided and no internal action. Can you please tell me why is that?

[µC_Wrangler]

Alarm groups 20 and 21 are part of the Standby Domain - see Figure 159 SMU Architecture in the User Manual.  The standby domain can only switch FSP to a high impedance state, per 15.3.2.4 Alarm Handling.

Because the standby domain is separate from the main SMU logic (see Figure 111 Monitoring and Reset Pins), it's actually part of the Power Management System.  The alarm registers are PMS_AG20_STDBY and PMS_AG21_STDBY.