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Hello Infineon,
- I am using TC397 ADAS MCU for Ethernet communication.
- The example code is in RGMII interface, and it has been changed to RMII interface. (Using LAN8742 PHY chip)
- Link Up of PHY chip(LAN8742) has been confirmed as set.
- For the connection between the PHY chip and the laptop, a total of 4 wires are connected: TX+, TX-, RX+, RX-.
- The LNKSTS, LNKMOD, and LNKSPEED registers are not changed, so the value is read from the PHY chip and then changed.
- There is no mention of the above registers in the datasheet for the RMII interface.
- So, depending on the state of the current PHY chip, the mode and speed are forcibly set and used.
* In TC375, the above register is used as the RMII interface, so it is thought that it can be used in TC397.
This is a modified code based on the example code.
IfxGeth_Eth_Phy_Lan8742_init function performs PHY chip initialization and Auto-Nego settings.
Conclusion: When will GETH_MAC_PHYIF_CONTROL_STATUS.B.LNKSTS, LNKMOD, LNKSPEED change?
(only read register)
Ifx_GETH_MAC_PHYIF_CONTROL_STATUS LAN8742_LinkStatus;
LAN8742_LinkStatus.U = IfxGeth_Eth_Phy_Lan8742_link_status(&LAN8742);
if (LAN8742_LinkStatus.B.LNKSTS == 1)
{
// we have a valid link
netif->flags |= NETIF_FLAG_LINK_UP;
// we set the correct duplexMode
if (LAN8742_LinkStatus.B.LNKMOD == 1)
IfxGeth_mac_setDuplexMode(ethernetif->gethSFR, IfxGeth_DuplexMode_fullDuplex);
else
IfxGeth_mac_setDuplexMode(ethernetif->gethSFR, IfxGeth_DuplexMode_halfDuplex);
// we set the correct speed
if (LAN8742_LinkStatus.B.LNKSPEED == 0)
// 10MBit speed
IfxGeth_mac_setLineSpeed(ethernetif->gethSFR, IfxGeth_LineSpeed_10Mbps);
else
if (LAN8742_LinkStatus.B.LNKSPEED == 1)
// 100MBit speed
IfxGeth_mac_setLineSpeed(ethernetif->gethSFR, IfxGeth_LineSpeed_100Mbps);
else
// 1000MBit speed
IfxGeth_mac_setLineSpeed(ethernetif->gethSFR, IfxGeth_LineSpeed_1000Mbps);
}
Thank you
Solved! Go to Solution.
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If RX reception failure and RX FIFO OVERFLOW occur intermittently, how about increasing the queue size?
static void low_level_init(netif_t *netif)
{
...
GethConfig.mtl.rxQueue[0].rxQueueSize = IfxGeth_QueueSize_5120Bytes;
...
}
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Hi,
Could you list the open points or action required on this topic?
Best Regards.
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Ethernet_1_KIT_TC375_LK example code uses LNKSTS, LNKMOD, LNKSPEED registers as RMII interface.
I want to use the LNKSTS, LNKMOD, and LNKSPEED registers, but they are not updated.
How can I enable update of that register?
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I have the same problem, I can't find how this register(GETH_MAC_PHYIF_CONTROL_STATUS) values are updated.I use the RGMII interface,but the value of register GETH_MAC_PHYIF_CONTROL_STATUS is always 0.
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Have you tested using the Ethernet_1_KIT_TC397_TFT example code?
The Ethernet_1_KIT_TC397_TFT example uses the RGMII interface.
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Yes, My Code is written based on Ethernet_1_KIT_TC397_TFT example.But, the PHY hardware in my board is Marvell 88Q2110(run in 100M mode).When I test my code, it works OK, but There is a low probability that the data cannot be received by GETH, and sending is always success.I Analyze register status of GETH,and find GETH RX FIFO overflow.The reason it happens is that DMA channel 0 receive process state is suspended, Receive Buffer Unavailable.
At the same time, the value of GETH_MAC_PHYIF_CONTROL_STATUS is not updated.
Now, I don't know how to solve this problem.
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If RX reception failure and RX FIFO OVERFLOW occur intermittently, how about increasing the queue size?
static void low_level_init(netif_t *netif)
{
...
GethConfig.mtl.rxQueue[0].rxQueueSize = IfxGeth_QueueSize_5120Bytes;
...
}
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It seems to have improved, let me test more, thank you!