AURIX™ Forum Discussions

[User19909]

Hello,
I have a question regarding the MPU, if I configure MPU regions, are these regions being copied to the MPU HW registers after OS init? or when exactly will MPU start comparing CPU address accessing with the MPU configured ranges.

[NeMa_4793301]

How an OS handles MPU registers is a good question for your OS supplier. At the hardware level, MPU protection begins as soon as CPUx_SYSCON.PROTEN=1.

[User19909]

so a question for the HW supplier, it is mentioned that there should be at least 15 padding bytes between any 2 adjacent MPU regions, what would happen if this does not exist? because if I have a case that currently I might not be able to reserve padding bytes between adjacent regions, so what do I expect here? is there a workaround?

[NeMa_4793301]

The padding covers the effects of data caching and wide data access (e.g., 64-bit load/store). Expect undesired MPU traps if your application does not comply.