May 14, 2020
05:11 AM
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May 14, 2020
05:11 AM
Hello Support,
Will it be a Trap or SMU Alarm when CPU Core accesses register address or memory address regions?
Please provide me a section number or paragraph of the corresponding documentation where this failure is described.

Best regards
Will it be a Trap or SMU Alarm when CPU Core accesses register address or memory address regions?
Please provide me a section number or paragraph of the corresponding documentation where this failure is described.
Best regards
- Tags:
- IFX
1 Reply
May 14, 2020
06:58 AM
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May 14, 2020
06:58 AM
Probably both. The target region will generate a bus error which will be caught by the SRI XBAR interconnect, and will generate an alarm. The error will then cause a trap in the CPU (DIE or PIE trap).