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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,
Will it be a Trap or SMU Alarm when CPU Core accesses register address or memory address regions?
Please provide me a section number or paragraph of the corresponding documentation where this failure is described.
4291.attach
Best regards
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Darren_Galpin
Employee
Employee
First solution authored First like received
Probably both. The target region will generate a bus error which will be caught by the SRI XBAR interconnect, and will generate an alarm. The error will then cause a trap in the CPU (DIE or PIE trap).
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