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User18816
Level 1
Level 1
Hi,

We are trying to flash the TC297 and TC397 reference boards with firmware using the memtool.

We observed that our hex file has addresses in the segment starting 8000 ( Segment 8 for TC297).
However, the memtool shows address starting A000 when we select PF0.
How to change this to make the memtool show addresses starting 8000 when PF0 is selected?

Also, does the memtool also process the second last record ( Start Linear Address ) for example :04 0000 05 80000020 57

Another query, is if we have a hex file that has addresses in the range of PF0 ( 8000 0000 to 801F FFFF) and also PF1 ( 8020 0000 to 803F FFFF), then do we need separately select the records for PF0 and PF1 and flash separately one after the other?
Request to confirm please.

Also, how to set the flash address for core 0,1,2? My understanding was it maps for PF0,1,2. Is it that way or configurable?

Requesting the above information please.

thanks and regards,

AAA
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2 Replies
cwunder
Employee
Employee
10 likes given 100 solutions authored 5 likes given
Hello AAA,

When changing a UCB you need to ensure that you have a stable power supply and confirmed the values before you perform a reset. The UCB values are only evaluated after a reset.
Memtool has been designed to update the UCB's correctly.

When getting started:
For the TC2xx devices you don't have to write to a UCB as the BMI is located at specific locations in the PFlash.
For the TC3xx device you must write the BMHDx.STAD in the UCB as this is a change to the previous generation devices.


How to change this to make the memtool show addresses starting 8000 when PF0 is selected?
The BMI start address should always be to a non-cached address. For the TC2xx devices the BMI must be located at specific locations in the PFlash. The first instruction of your code should be a to jump to cached or non-cached depending on the location of your CSTART.

Also, does the memtool also process the second last record ( Start Linear Address ) for example :04 0000 05 80000020 57
Why would it not? However since it is a "Start Segment Address Record" that does not change the flash memory on the device."

Another query, is if we have a hex file that has addresses in the range of PF0 ( 8000 0000 to 801F FFFF) and also PF1 ( 8020 0000 to 803F FFFF), then do we need separately select the records for PF0 and PF1 and flash separately one after the other?
It is not required, There is no restriction on where the code for each CPU resides in the PFlash. The PC of the CPUx determines what addresses should be fetched.

Also, how to set the flash address for core 0,1,2? My understanding was it maps for PF0,1,2. Is it that way or configurable?

The only requirement is for CPU0 to start the other cores. Each core should have its own startup code where CPU0 will initialize the PC for the other CPU's and start them. Note: all of this is done in the Bifaces as an example.
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User18816
Level 1
Level 1
Thanks a lot for the information.

We could flash both the TC297 and also the TC397.

The TC397 bifaces framework provides very good workspace/framwork which takes care of the UCB as well

Thanks.
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