Announcements

Robots are revolutionizing our lives in many ways. Join our webinar to learn about Infineon’s broad portfolio of robot building blocks.
Click here to register.

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

AURIX™ Forum Discussions

pzteoh
Level 1
Level 1
First question asked First like given Welcome!

Hi,

The TC3XX user manual under EVADC chapter states UCB05 contains DVDDK and VDDKC values which can be used to determine the deviation of ADC supply voltage Vddk at different temperatures. However, no further information provided on how users should utilize this value or required to perform any form of compensation. Questions are:

1) Should the software periodically read the Tj temperature, obtain the Vddk at the particular instance and calculate the deviation?

2) What are the actions required  (trigger which safety alarm?) should the deviation from expected value is over a threshold (user defined)?

3) Or the above understanding are wrong, the comparison is done by the chip itself without software intervention and sets some alarm flag in case of unexpected deviation?

Please share from your perspective. Thanks.

0 Likes
1 Solution
µC_Wrangler
Employee
Employee
100 sign-ins 25 likes received 25 solutions authored

Hi pzteoh.  See 32.12.5 On-Chip Supervision Signals in the EVADC chapter of the User Manual.  The idea of allowing the EVADC to read the internal bandgap VDDK is that you can verify that VAREF is correct, and that each converter is functioning properly.  The example shows how you can calculate the correct offset given the die temperature.

Whether you do this once or periodically is up to you, and the reaction is also an application-specific decision.  As always, make sure that you don't create a "warranty generator" - making your limits too strict can result in false failures.  For example, the internal bandgap has an accuracy of +/- 2%; applying limits of +/- 2% would not account for inaccuracies in the die temperature sensors, variation in VAREF, etc. 

View solution in original post

1 Reply
µC_Wrangler
Employee
Employee
100 sign-ins 25 likes received 25 solutions authored

Hi pzteoh.  See 32.12.5 On-Chip Supervision Signals in the EVADC chapter of the User Manual.  The idea of allowing the EVADC to read the internal bandgap VDDK is that you can verify that VAREF is correct, and that each converter is functioning properly.  The example shows how you can calculate the correct offset given the die temperature.

Whether you do this once or periodically is up to you, and the reaction is also an application-specific decision.  As always, make sure that you don't create a "warranty generator" - making your limits too strict can result in false failures.  For example, the internal bandgap has an accuracy of +/- 2%; applying limits of +/- 2% would not account for inaccuracies in the die temperature sensors, variation in VAREF, etc. 

This widget could not be displayed.