# Tricore-TC277 STM(System timer)

Level 3
Level 3
Hello All ,
Can any one please explain me how the STM(system timer logic works). i can understand it is a 64 bit timer and the value cannot be read in full so it is spitted into two registers. The interrupt generationof the tick is based on the compare and capture value of the timer.
I am not able to understand how the compare and capture register are acting producing counter at required rate(eg 1 ms). Please can you explain with an example especially the snapshots below(Fig 1 and Fig 2).
i will be really grateful to anyone providing me this explanation

nation.

Kind regards,
Deepak
8 Replies

Employee
Employee

# Re: Tricore-TC277 STM(System timer)

Level 3
Level 3
Hello Cwunder,
Thank you very much for the link.
Please can you explain me the scope of the function IfxStm_increaseCompare(g_Stm.stmSfr, g_Stm.stmConfig.comparator, TimeConst_100ms); (IncreaseCompare).

# Re: Tricore-TC277 STM(System timer)

Level 3
Level 3
And also from the link provided, It is a very nice description, but i am not getting How to determine the STM ticks. As it is mentioned over there,

1) To calculate the compare value you take the period you want and divide it by the tick time of the STM. How do we determine the STM tick rate as 10nsec ?

2) Now you need to remove the trailing zeros from this value which will also be the MSTART value. In this case it is 7, and now we right shift this by 7 to get 0x1312D which is the compare value. How do we determine the MSTART and MSIZE value?

Please shed some light on this including my question in the above thread.

# Re: Tricore-TC277 STM(System timer)

Employee
Employee
I don't use the iLLD so I cannot comment on them.

In regards to the STM tick rate being 10nsec; if you have the system timer being clocked at 100Mhz then the resolution is 10nsec.

For a 100msec timeout, the compare is 0x1312D, MSIZE0 is 17 and MSTART0 is 7 (CMCON = 0x711)

Example code for the Hightec
`#define INTPRIO_STM0_STMIR0 (1)#define INTPRIO_STM0_STMIR1 (0)#define CMP0_COMPARE_VALUE  (0x1312Du)#define MSIZE0              (17u)#define MSTART0             (7u << 8u)#define CMP1_COMPARE_VALUE  (0x5F5E1u)#define MSIZE1              (19u << 16u)#define MSTART1             (8u << 24u)#define CMP0_TOS            (0u)#define CMP1_TOS            (0u)#define ICR_VALUE           (0x1u)#define OCS_SUS             (18u << 24u)#define SRC_SRE             (1u << 10u)/**************************************************************************Object: Initialization of CPU0 System Timer PeripheralParameters: NoneReturn: Nothing**************************************************************************/void STM0_Init(void) {  /* fSTM = fsource0 / 2, see CCUCON0 register */  /* Stop the STM when the CPU is stopped */  STM0_OCS.U = OCS_SUS;  /* The Periodic interval for STM0 is 0.10 Seconds */  STM0_CMP0.U = STM0_TIM0.U + CMP0_COMPARE_VALUE;  /* The Periodic interval for STM1 is 1.00 Seconds */  STM0_CMP1.U = STM0_TIM0.U + CMP1_COMPARE_VALUE;  /* STM Compare Match Control Register Value: 0x8130711 */  STM0_CMCON.U = MSTART1 | MSIZE1 | MSTART0 | MSIZE0;  /* the SRC0 Interrupt serviced by TriCore */  IFX_INTERRUPT(STM0_ISR0, 0, INTPRIO_STM0_STMIR0);  SRC_STM0SR0.U = CMP0_TOS | SRC_SRE | INTPRIO_STM0_STMIR0;  /* Configure the Interrupt Control Register of the STM  */  STM0_ICR.U = ICR_VALUE;}/**************************************************************************Object: Interrupt routine for STM0_SR0Parameters: NoneReturn: Nothing**************************************************************************/void STM0_ISR0(void) {   /* load compare register for next event */  STM0_CMP0.U += CMP0_COMPARE_VALUE;}`

# Re: Tricore-TC277 STM(System timer)

Level 3
Level 3
hello Cwunder,
thank you very much for more detailed reply, kindly apologise for asking this question again.
i am trying to figure out how MSTART and MSIZE vlaues are set. For the above example,
For example, Compare value is 0x1312DU MSIZE is 17 and My question How and why come MSTART valuue is 7 and also left shifted to 8 bits( 7u << 😎 ?

and in Compare value 1 (0x5F5E1u), I can understand the MSIZE1 is 19 but why it is left shifted to 16(19u << 16u).. How do you get MSTART1 value as 8 and leftshifted to 24 bits.(8u<<24u).

Basically my question is How the MSIZE and MSTART values are arrived and that with left shift operator.?

# Re: Tricore-TC277 STM(System timer)

Employee
Employee
Here is detailed explanation for 50msec timeout. Hopefully you can figure it out for another timeout.

# Re: Tricore-TC277 STM(System timer)

Level 3
Level 3
Thank you C wonder, it is indeed very useful to understand with schematics.

# Re: Tricore-TC277 STM(System timer)

Employee
Employee
Hello deepakseshan1,

You can also find a quick guide on the STM module here: System Timer Module.
Furthermore, if you are interested on how to use the module, you can find a code example project that uses the module here: STM training code example.
this example also comes with a tutorial, which can be found here: STM tutorial.

If you are interested in other modules and you want to start programming for AURIX™, you can get the new Integrated Development Environment (IDE) here: AURIX™ Development Studio and get inspired by numerous trainings from here: AURIX™ Trainings.

If you are not familiar with Eclipse based IDE’s checkout the Getting Started guide!

Hope it helps,
teoBits