[TC9XX] Go to OFF instead of StandBy mode

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User20237
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Hello,
I have a board whre the TC39X is supplied by PMIC. The VEXT and VEVRSB of the uC are separated but both of them controled by PMIC, so when the PMIC is in standby mode, it activates only VEVRSB.
In standby of the PMIC, I wouldn't want the uC to go into Standby mode but in OFF mode instead. Fo that, I configured the folowing protected registers during the init phase of the SW:

PMSWCR0.U =0u
PMSWCR4.U = 0u

Is the above configuration the correct way to avoid the StandBy mode of the uC?
Do you have any idea about the typical current consumption of TC9XX in standby mode?

Thanks!
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cwunder
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I wouldn't want the uC to go into Standby mode but in OFF mode instead

For this you would just remove power from all of the power rails on AURIX from the PMIC (i.e. VEXT and VEVRSB = 0).
Do you have any idea about the typical current consumption of TC9XX in standby mode?

Typical standby mode with the SCR off and only VEVRSB powered is around ~100uA at room temperature.
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User20237
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Thank you for your response.

For this you would just remove power from all of the power rails on AURIX from the PMIC (i.e. VEXT and VEVRSB = 0).

The PMIC is configurable via Aurix, so I think it's impossible to cut these voltages while PMIC is in standby mode. Could you please confirm?
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cwunder
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What PMIC are you using?
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User20237
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cwunder wrote:
What PMIC are you using?

I'm using TLF35584.
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NeMa_4793301
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LSarah wrote:
The PMIC is configurable via Aurix, so I think it's impossible to cut these voltages while PMIC is in standby mode. Could you please confirm?


See the State Machine diagram in the TLF35584 datasheet - when the TLF is in STANDBY state, LDO_uC is OFF, while LDO_Stby is SELECTED. While still in WAKE state, you can disable LDO_Stby (QST) by having the AURIX send the SPI command to set RSYSPCFG0.STBYEN=0.
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User20237
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UC_wrangler wrote:
See the State Machine diagram in the TLF35584 datasheet - when the TLF is in STANDBY state, LDO_uC is OFF, while LDO_Stby is SELECTED. While still in WAKE state, you can disable LDO_Stby (QST) by having the AURIX send the SPI command to set RSYSPCFG0.STBYEN=0.

Basing on this thread's answer, VEVRSB is needed in all Aurix uC Modes.
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NeMa_4793301
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Didn't you start by saying you wanted to turn the AURIX off? You can either keep the AURIX Standby Controller alive with VEVRSB, or switch it off completely by cutting off all supplies.
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User20237
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UC_wrangler wrote:
Didn't you start by saying you wanted to turn the AURIX off? You can either keep the AURIX Standby Controller alive with VEVRSB, or switch it off completely by cutting off all supplies.


Yes, but imagine that the Aurix is in shutdown process. Before it sends standby cmd to PMIC, it will send the cmd to disable QST RSYSPCFG0.STBYEN, since this input VEVRSB is needed in all modes, the uC detects that there is a problem in the supply after that it will perform a Hard reset. The PMIC in this case will go to FAilSafe Mode.
Cutting off all power supplies, it’s not possible since there is not an other uC that is always running and controls the PMIC in standby mode. The limitation is that I have only 1 PMIC and 1 Aurix on my board.
Maybe the HW design should be changed, to connect directly VEXT and VEVRSB to QUC, then if the PMIC is in Standby mode, it will cut off all power supplies.
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NeMa_4793301
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After consulting with the TLF35584 expert:
- Writing RSYSPCFG0.STBYEN=0 won't help, because it does take effect immediately in WAKE state, which indirectly causes the AURIX to reset:
11.2.2.5.1 Primary under-voltage monitors and Cold PORST
Undervoltage of external VEVRSB supply will lead to the assertion of the LVD reset indirectly via the VDDPD POR monitor as VDDPD is generated from VEVRSB.

- Even if STBYEN worked, the TLF won't change the QST state when going from STANDBY to INIT, so the AURIX wouldn't wake up

Maybe the HW design should be changed, to connect directly VEXT and VEVRSB to QUC, then if the PMIC is in Standby mode, it will cut off all power supplies.

We've added QST independent control to our wishlist, but that would be for a future PMIC. Sorry for the confusion.
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