Hello Support,
TC3XX Clock Monitoring is described below in section 10.9.1 Clock Monitoring
The basic principle of alive monitoring is to detect that the monitored clock is toggling within a certain reference
time slot generated by the diverse. What is clock toggling , and how do you understand it,Does that mean there's a clock frequency?
Best Regards
Hi @qiaozhi ,
Thank you for your interest in Infineon Semiconductor products and for the opportunity to serve you.
1) How do you understand it, does that mean there's a clock frequency?
-- Alive monitoring is a method of detecting that a clock is still functioning and toggling within a specific time window, which is generated by a reference clock. This ensures that the system is operating correctly and can detect any issues with the clock, such as a failure or drift in frequency, just like the below shows.
And clock toggling refers to the switching of a clock signal between two logical states (e.g. high and low, or 1 and 0).
BR,
Jeremy
Hello,Support,
Thank you very much for your reply. According to your reply, I understand the concept of clock toggling, but I still have the following questions about the Alive monitoring mechanism:
figure
Based on the description in this paragraph, I think it is only for the monitoring function that Fback has a failure or drift in frequency.But for Fpll0,Fpll1,Fpll2 and Fspb, I read the manual and found that only these few clocks were checked by clock toggle detet (as shown in the figure below).
Fpll0,Fpll1,Fpll2,Fspb clocks are only checked by toggle detet, so drift in frequency should not be monitored. However, there is a numerical comparison for Fback, which will monitor the drift in frequency. I don't know whether the understanding is correct, could you help me to answer it? Thank you.
Best Regards
