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I'm using TC399XE. I have a problem understanding how counter with compare (part of I2C module for generating SCL clock signal) operates.


I understand the way signal is generated using counter; toggle output at compare event. But why does it look like the decrement value (DEC) changes after each compare as if there would be two values specified for decrementing current value of counter after compare condition is satisfied. Also, after compare event, "Z" is decremented by DEC to some negative value, from where counter counts all the way up to 0 - but how could the count begin initially from value DEC, if this value is always positive?

I understand that "Z" value of counter can vary (after begin decremented by DEC), but that should be visible only as small deviations of duty cycle, while it would be approximately 50% most of the time (considering INC << DEC; referring to example below for "Standard Speed Mode").


Otherwise, I'm just trying to set up SCL speed to some standard baud rate values, but I'm worried the duty cycle setting might be set up to some extreme values (which are not tolerant by I2C module), if INC wouldn't be much less than DEC (only couple of increments before reaching compare value Z = 0; referring to example above for "Fast Speed Mode").
Also, how is duty cycle calculated, being given/calculated values for DEC, INC, F_scl and F_i2c ?

Best Regards,
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