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robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

I want to have for ATOM module a clock0 equal to 200 MHz but I don't know how to set it because I obtain always a clock of 100 MHz. Can you help me with errors?

I use this lines of codes:

gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1;
gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1; /* write twice to be sure, taken from specs */
gtm_ptr->CMU.GCLK_DEN.B.GCLK_DEN = 200000000/CLK_FREQ;

gtm_ptr->CMU.CLK[0].CTRL.B.CLK_CNT = 0;

gtm_ptr->CMU.CLK_EN.B.EN_CLK0 = 0x2;

1 Solution
robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

gtm_ptr->CLS_CLK_CFG.B.CLS0_CLK_DIV=1;
gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1;
gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1; // write twice to be sure, taken from specs
gtm_ptr->CMU.GCLK_DEN.B.GCLK_DEN = 1;
gtm_ptr->CMU.CLK[0].CTRL.B.CLK_CNT = 0;
gtm_ptr->CMU.CLK_EN.B.EN_CLK0 = 0x2;

 

Using these lines of codes the code doesn't run

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8 Replies
DownyK
Level 5
Level 5
100 replies posted 10 solutions authored 250 sign-ins

Hello 

which cluster did you use? 

and Did you check FsourceGTM frequency to set 200MHz?

 

robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

I am using channels of atom 0 and How Can I check FsourceGTM frequency?? I have to write which line of code? Thank you

DownyK
Level 5
Level 5
100 replies posted 10 solutions authored 250 sign-ins

DownyK_0-1684918862838.png

DownyK_1-1684918934405.pngDownyK_2-1684918953164.png

I don't know which code did you use, so it's hard to explain it with a code.

If you look at the document, you can use 200 MHz by setting the GTMDIV to 1 within the CCUCON0 register.

 

DownyK
Level 5
Level 5
100 replies posted 10 solutions authored 250 sign-ins

First, GTM frequency is derived from SPB frequency, and SPB is derived from syspll.

DownyK_0-1684920974282.png

And Syspll is made as below.

DownyK_1-1684921029608.pngDownyK_2-1684921045835.png

If you use a 20MHz external oscillator, you can get a syspll of 300MHz by setting the P divider to 29, the K2 divider to 1, and the P divider to 0.

Then go to the Register below and set SPBDIV = 3 and GTMDIV = 1, and you will get a GTM frequency of 200MHz.

DownyK_3-1684921236739.pngDownyK_4-1684921245556.pngDownyK_5-1684921253011.png

Then the CLS0_CLK in the figure below will be 200 MHz. If you use it without Global Clock Divider, you can use 200MHz as it is.

DownyK_6-1684921443621.png

 

 

 

 

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robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

Hi, thank you! So it is enough to set the GTMDIV to 1 within the CCUCON0 register?

About the following passages I am not sure about "If you use a 20MHz external oscillator"... I am using only the board I have not an external oscillator. Did I understand correctly? Or it is an oscillator that I can set inside the board?

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robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

gtm_ptr->CLS_CLK_CFG.B.CLS0_CLK_DIV=1;
gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1;
gtm_ptr->CMU.GCLK_NUM.B.GCLK_NUM = 0x1; // write twice to be sure, taken from specs
gtm_ptr->CMU.GCLK_DEN.B.GCLK_DEN = 1;
gtm_ptr->CMU.CLK[0].CTRL.B.CLK_CNT = 0;
gtm_ptr->CMU.CLK_EN.B.EN_CLK0 = 0x2;

 

Using these lines of codes the code doesn't run

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DownyK
Level 5
Level 5
100 replies posted 10 solutions authored 250 sign-ins

Hello,

in your board, Did you have any external oscillators? 

so then Did you use only the internal clock? 

 

as far as I know, Aurix has 2 Clock sources.

the first option is an external oscillator and the second is a backup clock. 

DownyK_0-1684977090654.png

 

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robs1
Level 4
Level 4
100 sign-ins 50 replies posted First solution authored

I use internal clock (system clock 300 MHz) 

and for ATOM so I use GTM clock 200 MHz but it set by default 100 MHz for gtm

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