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AURIX™ Forum Discussions

samcs
Level 1
Level 1
First reply posted 10 sign-ins 5 sign-ins

Hello, i read the <AURIX_TC38x-UserManual-v02_00-EN.pdf>, Table 369 Connections of QSPI0, QSPI0:SLSO(1), i wonder if the 1 is the CS signal? 

in <AURIX_TC3xx_Part2-UserManual-v02_00-EN.pdf>, SLSO0..4, are selector inputs of the Demux, be used to trigger CS0..CS16.

samcs_0-1679160487329.png

So table 369 Connections of QSPI0, QSPI0:SLSO(X), Is the 'X' in 'QSPI0:SLSO(X)' referring to the CSx of Figure 477?

 

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cwunder
Employee
Employee
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To my knowledge you cannot randomly choose the SLSO(X) pins when using an external decoder. The manual seems clear that SLSO0 is used for the enable/strobe, and SLSO1..4 can be used for the address inputs. 

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cwunder
Employee
Employee
50 solutions authored 250 sign-ins 25 likes received

Table 369 Connections of QSPI0, QSPI0:SLSO(1), i wonder if the 1 is the CS signal? 
Correct the number in the parentheses represent the Chip Select Signal number from 0 to 15. 

So table 369 Connections of QSPI0, QSPI0:SLSO(X), Is the 'X' in 'QSPI0:SLSO(X)' referring to the CSx of Figure 477?
No, QSPI0:SLSO(X) signals go to an external decoder/demultiplexer (SLSO0 goes to the enable and SLSO[4:1] go to the address inputs). The binary value represented on SLSO[4:1] represents the CSx you would  access.

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samcs
Level 1
Level 1
First reply posted 10 sign-ins 5 sign-ins

Thanks, so in Figure 477, SLSO0, SLSO[4:1] are internal symbols of QSPI or MCU, are not exposed to the MCU user,correct? 

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cwunder
Employee
Employee
50 solutions authored 250 sign-ins 25 likes received

Sorry I think there is a misunderstanding. SLSO(x) are alternate pin functions. These are mapped to pins according to the datasheet. Figure 477 is a special case for the SLSO pins. This mode allows you to use an external decoder to created up to 16 chips selects using only 5 SLSO pins. 

For example, consider QSP0 on the TC38x there are a possible 14 SLSO pins. 

 

Interface Signals connects Description
QSPI0:SLSO(0) to P20.8:ALT(3) Master slave select output
QSPI0:SLSO(1) to P20.9:ALT(3) Master slave select output
QSPI0:SLSO(2) to P20.13:ALT(3) Master slave select output
QSPI0:SLSO(3) to P11.10:ALT(3) Master slave select output
QSPI0:SLSO(4) to P11.11:ALT(3) Master slave select output
QSPI0:SLSO(5) to P11.2:ALT(3) Master slave select output
QSPI0:SLSO(6) to P20.10:ALT(3) Master slave select output
QSPI0:SLSO(7) to P33.5:ALT(2) Master slave select output
QSPI0:SLSO(8) to P20.6:ALT(3) Master slave select output
QSPI0:SLSO(9) to P20.3:ALT(3) Master slave select output
QSPI0:SLSO(10) to P22.11:ALT(4) Master slave select output
QSPI0:SLSO(11) to P23.6:ALT(4) Master slave select output
QSPI0:SLSO(12) to P22.4:ALT(4) Master slave select output
QSPI0:SLSO(13) to P15.0:ALT(3) Master slave select output
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samcs
Level 1
Level 1
First reply posted 10 sign-ins 5 sign-ins

So, my understanding is, the SLSO(1:13), I can use 5 of them [ex:SLSO(0/1/5/8/13)] to connect to an external decoder to demux to 16 CSs?

Am I correct? 

And i wonder if SLSO(X), is the "X" be mapped to Spi/SpiExternalDevices/SpiCsIdentifier parameter in Autosar ? ex: CHANNELX.

Thanks

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cwunder
Employee
Employee
50 solutions authored 250 sign-ins 25 likes received

To my knowledge you cannot randomly choose the SLSO(X) pins when using an external decoder. The manual seems clear that SLSO0 is used for the enable/strobe, and SLSO1..4 can be used for the address inputs. 

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