AURIX™ Forum Discussions

[User19977]

Hi there,

In the MCAL manual, it said xxx module enters sleep mode upon sleep request from MCU.
But I am having trouble finding how or who sends the MCU sleep request.
Anybody could help, please?

Thanks, Ke

[NeMa_4793301]

Check out 8.8 Low Power Modes in Aurix_MC-ISAR_UM_MCUDriver.pdf.

[User19977]

thanks. I thought Mcu_setMode(SLEEP) only put cpu into sleep mode. Do I need to do anything for peripherals?

Thanks, Ke

[NeMa_4793301]

Please allow me to interject - what are you trying to achieve, in terms of total power draw? As long as a TC27x remains powered, it's drawing a lot of current - you can put individual cores to sleep (~10 mA each), reduce clock speeds, and turn off peripherals, but you'll still have gigantic current and leakage through all the RAMs, SRI logic, SPB logic, etc. Generally the effort for shutting things down and reducing clocks isn't worth the trouble.

The TC3xx has a Standby Controller that allows you to get down to 150 uA, but that doesn't exist in the TC27x.

[cwunder]

The TC27x does have Standby mode which can reach 150uA (Standby RAM is active. Power to remaining domains switched off. TJ =25°C; VEVRSB = 5V)

Standby entry on VEXT supply ramp-down triggered by the secondary undervoltage event at a configurable threshold. Standby domain continue to be supplied by a separate VEVRSB supply pin (TC277).
Wake-up on VEXT supply ramp-up in case of separate VEVRSB Standby supply:Standby domain is supplied by the dedicated VEVRSB supply pin. Wakeup is triggered when main VEXT supply ramps-up again.

[User19977]

Thanks, both of you for the replies.

I have the option to shut down the power but we need to add another wakeup source, and the concern is the start-up sequence is not fast enough. Is it possible to completely shut down the clock to peripherals? How low the system clock can go to achieve the 150uA? Any digital pin can wake it up?

Many thanks, Ke

[NeMa_4793301]

The 150 uA option cwunder mentioned only covers the case where RAM is left powered. All other logic would be off.

Otherwise, it's awfully hard to get under 50 mA, even if you drastically reduce CPU and bus clocks. Is 50 mA helpful for your application?

[User19977]

50 mA might not be good enough. We can turn off everything, even the RAM, (but keep the DSPR in CPU0 if possible), as long as a DIO interrupt can wake up the micro.

Thanks, Ke

[cwunder]

In Sleep mode the datasheet calls out a max of 15mA (All CPUs in idle, All peripherals in sleep, fSRI/SPB = 1 MHz via LPDIV divider; TJ = 25°C). Exiting Sleep Mode:The system will exit Sleep mode on any wakeup event that causes any master CPU to exit Idle Mode depending on CPUSEL configuration. See 7.3.2.3 Sleep Mode in the users manual.

In Standby mode with VEXT and VEVRSB powered you could expect under 1 mA @ TJ = 25°C. Exiting Sleep mode in this configuration is done via a wake-up via NMI / Pinx: Wake-up on rising, falling or any edge of NMI / ESR1, Pin A or Pin B pins. Note this also requires the system to go through a reset. See 7.3.2.4 Standby Mode

[User19977]

thanks for your help.