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AURIX™ Forum Discussions

Level 3
Level 3
10 replies posted 5 replies posted 10 questions asked
. I am having a query about DMA transfer.
1) I am developing DMA driver and It requires a continous DMA transfer from Source to Destination which is intiated by Software reuest.

After going through the manual and examples I understand "CHCSR.SCH = 1" will initiate automatically DMA transfer and when i implemented in my code it doesnt work and I was getting TRAP error while debugging.

My question:- Is it possible to perform continous DMA transfer without using linked list feature?

Note:- I am using iLLD for reference.

Kindly help me on this query.

void initDMA(void)
// int i;
/* Load default module configuration into configuration structure */
IfxDma_Dma_initModuleConfig(&g_DMA.dmaConfig, &MODULE_DMA);

/* Initialize module with configuration. */
IfxDma_Dma_initModule(&g_DMA.dmaHandle, &g_DMA.dmaConfig);

/* Get/initialize DMA channel configuration for all DMA channels otherwise use &g_Dma.dmaChannel as target */
IfxDma_Dma_initChannelConfig(&g_DMA.dmaChNCfg, &g_DMA.dmaHandle);

/* Set desired DMA channel: Channel 0 is used */
g_DMA.dmaChNCfg.channelId = DMA_CHANNEL_ID;

/* Setup the operation mode/settings for DMA channel */
g_DMA.dmaChNCfg.moveSize = IfxDma_ChannelMoveSize_32bit;
/* Set the number of DMA transfers */
g_DMA.dmaChNCfg.transferCount = (uint16)MEMORY_TRANSFER_NUM_DATA;

/* Execute the DMA transaction with only one trigger */
g_DMA.dmaChNCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
g_DMA.dmaChNCfg.shadowControl = IfxDma_ChannelShadow_srcDirectWrite;
g_DMA.dmaChNCfg.sourceAddress = (uint32)&Source;
g_DMA.dmaChNCfg.destinationAddress = (uint32)&destination;
/* Address to next TCS */
for(int i = 0; i < BUFFERSIZE ; i++){
g_DMA.dmaChNCfg.shadowAddress = (uint32)&Source[(i + 1) % BUFFERSIZE]; }

/* Enable interrupt on completion of the last DMA */
g_DMA.dmaChNCfg.channelInterruptEnabled = TRUE;

// Init DMA
IfxDma_Dma_initChannel(&g_DMA.dmaChannel, &g_DMA.dmaChNCfg);
// Autostart>CHCSR.B.SCH = 1;

/* Configure & enable DMA Channel0 interrupt */
g_dmaCh0Src_ = IfxDma_Dma_getSrcPointer(&g_DMA.dmaChannel);
IfxSrc_init(g_dmaCh0Src_, IfxSrc_Tos_cpu0, ISR_PRIORITY_DMA_CH0);


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