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Hi all,
I am trying to enable SRAM ECC based on understanding of MTU registers and iLLD_1_0_1_10_0. When after executing below code in Figure 1, the problem occurs and I cannot figure it out.
Figure 1 MTU module enable
# Problem : MC_CPU0/1_PTAG.ECCD.ECE keep Disable
ECCD.ECE of other SRAMs have been automatically set Enable after Figure 1, (including MC_CPU1_DSPR, MC_CPU1_DTAG, MC_CPU1_PSPR,MC_CPU1_PSPR, MC_CPU0_PSPR). However, only MC_CPU0/1_PTAG.ECCD.ECE are automatically set Disable.
Also even under LAUTERBACH TRACE32, only MC_CPU0/1_PTAG.ECCD.ECE cannot be manually set between Enable and Disable, the other SRAMs mentioned can be changed easily. It seems like that MC_CPU0/1_PTAG.ECCD.ECE are always set as Disable by something. But I don't know what it is.
Hope some guy shares insight with me. Thanks a lot !
Best Regards,
tripod
Solved! Go to Solution.
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PTAG is part of the program cache. Do you have program cache disabled at that point in your application? Make sure CPUx_PCON0.PCBYP=1 (cache bypassed).
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