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第三方针对TC234芯片在安全刷写(security update)过程中对PFLASH存在读/写冲突问题,给出了说明:
将主循环代码放到RAM中运行,
- 此方案是否有效(在host侧设置delay时间):我们的MCU软件工程师认为该建议不可行,而是如何保证Tricore和HSM侧同步问题。步骤如下:
- Tricore端在对PFLASH进行操作(刷写)之前,首先向HSM发出指令;
- HSM对Tricore端做出回应,是否已完成了对PFLASH操作;
- HSM根据Tricore端回应,执行对PFLASH操作。
因此HOST端delay对HSM是否执行完对PFLASH操作没有直接关联。
2)如果设置delay时间方案有效,需要设置多次delay时间。
Solved! Go to Solution.
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a. OK
b. OK
c. This step does not fit in the sequence, as in step b, PFLASH write operation is already complete, what response is HSM expecting from host(tricore)?
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@Sharath_V could you please have a look at this thread.
A third party explained that the TC234 chip has a read/write conflict problem with PFLASH during the security update process:
Put the main loop code into RAM to run,
Whether this solution works (set the delay time on the host side): Our MCU software engineers think that this suggestion is not feasible, but how to ensure the synchronization of the Tricore and HSM side. The steps are as follows:
The Tricore side first issues instructions to the HSM before operating (flashing) on PFLASH;
HSM responds to the Tricore side, whether the PFLASH operation has been completed;
The HSM responds to the Tricore side and performs the PFLASH operation.
Therefore, HOST-side delay is not directly related to whether the HSM has finished performing PFLASH operations.
2) If the delay time scheme is valid, you need to set the delay time multiple times.
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Hi @Di_W,
I am not sure if I fully understood the problem and the scenarios.
If your problem is that there is a flash read problem while it is being written/programmed, irrespective of whether HSM or host SW is programmed, the code which performs the flash programming shall run from RAM.
This is because in TC23x, there is only 1 PFLASH bank and hence when any SW is programmed, PFALSH will be in busy state. In the busy state, you cannot run any code from PFLASH or read it.
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Yes, you are quite right. Our expected solution is: Set the delay setting, but how much delay is appropriate?
Is there a recommended solution?
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What do you mean by delay? How long to wait on host side, until programming on HSM side is finished?
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yes,is the solution discribed below ok?
a.The Tricore side issues instructions to the HSM before preforming operations on the PFLASH (writing);
b.The HSM responds to the Tricore side whether the PFLASH operation has been completed;
c.The HSM performs operations on the PFLASH based on the Tricore response;
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a. OK
b. OK
c. This step does not fit in the sequence, as in step b, PFLASH write operation is already complete, what response is HSM expecting from host(tricore)?
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Locking the thread due to inactivity, please create a new thread in case your query is not resolved.