Is there a way to change this so the output idle polarity is low?
Say for example you have 8-bit data in MSB mode. The data written is 0x00 the MTSR signal will maintain a "0" or low level, if you wrote data 0x01 the MTSR signal will maintain a "1' or high level.
In the TC399 (KIT_A2G_TC399_5V_TRB_S), I have confirmed the same behavior for the MTSR signal in QSPI master mode on the actual device.
Can I expect the same behavior for QSPI on the TC399 from a hardware standpoint as shown below?
" in master mode the MTSR output will maintain the last bit value transmitted."