Announcements

Help us improve the Power & Sensing Selection Guide. Share feedback

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
User19909
Level 3
Level 3
First like received
Hello,

Can STM0 and STM1 have different time base and start at different times? to elaborate, both STMs will operate with same frequency so ticks will always be increased with the same rate, but can STM0 and STM1 have different values and have a shift between them? e.g
at a specific time stamp STM0 has value of 20 and STM1 has a value of 30
at another time stamp STM0 has a value of 40 and STM1 has a value of 50,
so they both increased with same rate which is expected due to having same pll source, but can such scenario take place? can there exist a value shift between them for any reason such as one of them started before the other or so on?
0 Likes
6 Replies
NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
Under normal circumstances, no - they're driven by the same clock, so the delta will remain constant. But it's possible (albeit unlikely) for one to be corrupted by a soft error (bit flip).
0 Likes
MoD
Employee
Employee
10 likes given 50 likes received 500 replies posted
How you make sure that you access STM0 and STM1 at the same time? They are connected together on the SPB. It is not possible to access both modules at the same time to get an identically value. There will be always a difference, I think it is the difference between this two accesses what you see.
0 Likes
User19909
Level 3
Level 3
First like received
I have an issue where STM0 and STM1 have a very large shift even between the deltas between them, they start normally with equal values, then the shift keeps getting larger and larger until it reaches about 120k ticks, this happens consistently, and I have no idea why would suddenly during runtime the shift happens, they start normally at the beginning with equal values and then they keep deviating, what could cause such deviating?
0 Likes
NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
All the STMs are fed by the same clock source (divider set by CCUCON0.STMDIV), so they shouldn't diverge. They're all enabled by default, but I'm not sure where they're started within the internal firmware. But once started, the offset should be constant.

Are you reading STMx_TIM0, or one of the higher order variants (TIM1..TIM6)?

Also: why does it matter?
0 Likes
MoD
Employee
Employee
10 likes given 50 likes received 500 replies posted
Make sure that register STM_OCS is 0. If there is the OCDS Suspend Control is enabled then every time the suspend line is activated (e.g. by debugger, system halt) the STM stops counting.
0 Likes
Mathews
Level 1
Level 1
5 sign-ins First reply posted Welcome!

Reading STMx_TIM0 and STMx_TIM6 to read the 64bit timer value, x - 0 and 2, to perform STM:MONITOR ESM. STM_OCS is excluded already. Occasionally a difference of 1000 ticks is observed. Could you please suggest what could be going wrong ?

0 Likes