Speed of Data Read/Write for RAM( DSPR, PSPR, LMU )

[User19940]

Hello,

In tri core(TC275), what is the speed(in clock cycles) of accessing DSPR, PSPR, LMU ? i.e
1. Data read /write to own or other DSPR
2. Data read /write to own or other PSPR
3. Data read /write to LMU ??

Regards,
Shwetha

[Darren_Galpin]

Please take a look in the user manual at https://www.infineon.com/dgdl/Infineon-tc27xD_um_v2.2-UM-v02_02-EN.pdf?fileId=5546d46259d9a4bf015a84..., specifically table 2-16 (CPU access latencies).

[Darren_Galpin]

Note that the table doesn't have the LMU latency though. Seeing if I can find that....

[Darren_Galpin]

No, can't find it, but it should be similar to accessing other DSPR/PSPR.