SafetLib SRI test generating PRIV Trap

[Chaitanyak1]

SRi Test error generates PRIV Trap & it doesnt come out of this trap.

Any help would be appriciated. thanks

[LaneYE]

It looks like that the CPU is working in user mode and executes an instruction not allowed by user mode. You could see  PSW.IO bitfiled's value before execute wrong instruction in debug mode.

Note:After CPU enters trap, you can get wrong instruction's address in A[11].

[Chaitanyak1]

The test intentionally switches to user mode from supervisor mode, it expects DAE(Trap class 4, ID 3), but PRIV trap is generated.

[Yuva · Accepted solution]

Hello,

I request to discuss this topic with PDH or local sales as this is related to SafetTlib driver.

Thanks.