SRI Protocol Error of TC37x

[Jamber]

Hi,

SRI Protocol Error occured in my board which Lauterbach is connected. If App software is jumped from Bootloader, this error will occur, and If App software is directly startup without Bootloader, no Error will occur.

The status recorded by registers showes that this error is  triggered by Cerberus when read 0x700021A8, but I don't know the reason why it will trigger an error even 0x700021A8 is a normal DSPR address. 

What's more, it's an accidental error, sometimes error is not occured, and sometimes the error address is another.

How to confirm the rootcase?

Best regards

Jamber

[Jamber]

Hello, help me please

[Di_W]

Hi Jamber,

Sorry for the delay, I am asking and reply you as soon as possible.

dw

[MoD · Accepted solution]

This can be happen when the ram is not available, e.g. during memory test where the ram is not accessible.

[Jamber]

Hi MoD, thank you for reply! It's a very important point because MBIST is indeed in my project. I will test further to confirm it.

[Jamber]

Hi MoD, thank you again! It's confirmed. If MBIST is not executed, no error will be triggered.

[Di_W]

Hi @Jamber MoD has already give the explanation.

[Jamber]

Hi dw, Thank you for your help!