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AURIX™ Forum Discussions

GregU
Level 1
Level 1
First question asked Welcome!

The low end TC322 chips based on the AURIX TC33x/TC32x Variants description have no E-Ray peripheral, no DLMU/LMU. Yet based on the family description, the SMU alarms and MTU SSH instances belonging to these peripherals are at least described in the documentation.

Is it safe to request error clears via the MTU for the non-existing E-Ray, DLMU modules via write of TRC bit in the ECCD register? (SSH instances 4=CPU0_DLMU_STBY, 66 = ERAY_OBF0, 68=ERAY_TBF_IBF0, 70=ERAY_MBF)

Or should no accesses be made to the MTU for these SSH instances - meaning treat them as if they weren't there?

What is the recommendation in turn for the SMU alarm configurations? Do all alarms pertaining to the not present peripherals have to be configured to no-reaction? For example ALM6[14] - E-Ray uncorrectable critical error, ALM7[1] LMU uncorrectable critical error detection. If SMU alarm masking is required, is there a summary available on which alarms shall always be disabled for the low-end chips?

Or is is safe to have a configured reaction as long as the earlier MTU based error clear was done?

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Yuva
Moderator
Moderator
Moderator
100 solutions authored 25 likes received 100 sign-ins

Hello,

It is recommended not to access the resources unavailable for the device. So, our suggestion is to have the default SMU configuration for these alarms i.e. no reaction. You can refer to the "TC33x_TC32x_Data_Sheet_Addendum_v1.5.pdf" document to identify the available resources for TC322 device.

Thanks.

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Yuva
Moderator
Moderator
Moderator
100 solutions authored 25 likes received 100 sign-ins

Hello,

It is recommended not to access the resources unavailable for the device. So, our suggestion is to have the default SMU configuration for these alarms i.e. no reaction. You can refer to the "TC33x_TC32x_Data_Sheet_Addendum_v1.5.pdf" document to identify the available resources for TC322 device.

Thanks.

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