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User14049
Level 3
Level 3
What is MRIS - Master mode receiver input select for QSPI0 what it's function.
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11 Replies
User11979
Level 1
Level 1
Hello,

MRIS tells the QSPI module that through which port pin the data is received from the slave.


Regards,
Autosarian
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User14049
Level 3
Level 3
I want to configure QSPI0 of TC399, do you have any sample code for it.
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User11979
Level 1
Level 1
Hello KDN,

I'm sorry i don't have any sample code for TC399.
But I think you can download sample code from Infineon site if you have login credentials.
Try it.


Regards,
Autosarian.
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User14049
Level 3
Level 3
Can you please share link from where I can download.
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MoD
Employee
Employee
250 sign-ins 25 likes received 50 solutions authored
You can find all information here:
https://myicp-dmz.extra.infineon.com/SitePages/Home.aspx
If not yet done then registration is needed.
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
@MoD I think you meant to post the public link 😉

https://myicp.infineon.com/SitePages/Home.aspx
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User14049
Level 3
Level 3
Hi,

My QSPI2 chip select is always low and clock is also not getting output.


I am using SLSO1 of QSPI2(QSPI2_MRSTB), what setting should I use in BACON and SSOC resister.
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User14049
Level 3
Level 3
I am getting problem while reading data from FIFO of QSPI2.

Single data transmission and reception work fine.
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User14049
Level 3
Level 3
I checked status register, it's showing EXPECT time out error
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
Are you using the iLLD, or making your own SPI code? Can you share a code snippet?
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User14049
Level 3
Level 3
I am using my own code and it's working now in polling mode, I am using BIFACES to write code can you please help me how can I use it in interrupt mode.
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