I am working on QSPI using TC367 Micro. QSPI is configured as Master in Long Mode with a frame length of 16bytes (4 words, same as max FIFO size) and I am using DMA (Qspi in Single Move Mode) to move the data from RXEXIT to a RAM buffer.
My Slave is another TC367 Micro.
When communication with slave is working fine, if I turn off Power to Slave controller, I am expecting RXEXIT in Master shall receive all FF as data or partial FF depending on when the power to Slave controller is turned off.
But, when I am checking my Rx RAM buffer in Master (that holds the data from RXEXIT via DMA), the data sometimes come out all zeros (0x00000000) for 3~4 times and then changing to all FF's (0xFFFFFFFF).
I am thinking to use the concept that if my Rx RAM buffer value in Master is all FF, then consider this as SLAVE timeout. But, due to the above mentioned issue for 3~4 times of zeros, I am not able to use this concept.
Any thoughts of why RXEXIT might be updated to zero's first and then 0xFF's? or is there any other way to detect SLAVE is timed out?
I'm not sure if the idea to check the SLAVE_TIMEOUT based on the data is okay, let me check internally and will update you. Is your implementation idea based on the below statement ?
There could be corner case scenario in the run-time may be an Underflow event occurs but still SLAVE is working properly. In this case the Master assumes Slave is timed-out but may not be in real but I'll update you on this.