On chip Supervision Signal

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Sru2023
Level 1
Level 1
5 questions asked First reply posted 5 sign-ins

Hello In

From the user manual for On chip supervision signal,

Sru2023_0-1699339643698.png

-->To check the external reference Voltage is proper or not--> CH29 is measured in the CH0 of the particular group(alias feature)

--> The voltage of the Vmts Module test signal, provides the comparator supply voltage VDDK, which is
controlled by the bandgap in the power subsystem

-->According to the manual,

Sru2023_1-1699339992321.png

It  should measure around   1.256V--04D9(h) 

 

--> But I am measuring  0x 40D0--> VMTS

Sru2023_3-1699340087173.png

Can you please guide where I m wrong

 

 

 

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Meet_T
Moderator
Moderator
Moderator
25 likes received 50 solutions authored 100 replies posted

Hi @Sru2023 , Please check if you have configured the result position to be left aligned (G0CHCTRy.RESPOS = 1). In this case first 3 bytes (12 bits) of the RESULT would be the valid bits (kindly refer to 32.10.2 Data Alignment in usermanual) and your result would be 0x40D which is approximately the same as value mentioned in the manual.

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Meet_T
Moderator
Moderator
Moderator
25 likes received 50 solutions authored 100 replies posted

Hi @Sru2023 , Please check if you have configured the result position to be left aligned (G0CHCTRy.RESPOS = 1). In this case first 3 bytes (12 bits) of the RESULT would be the valid bits (kindly refer to 32.10.2 Data Alignment in usermanual) and your result would be 0x40D which is approximately the same as value mentioned in the manual.

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