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FD_aurix
Level 5
Level 5
100 sign-ins 100 replies posted 5 solutions authored
Hello All

I'm performing some first tests on Aurix trying to recompile some demoboard projects. I'm using Hightech compiler and the target is a TC377 Aurix. Once compiled it created the hex file but if I open it we see it start from 0x80000000 where I suppose it should start from 0xA0000000.

Probably is something to be configured into the .lsl file.


we have notice these two define that seems related to our problem.


LCF_STARTPTR_CPU0 = 0x80000000;
....
LCF_STARTPTR_NC_CPU0 = 0xA0000000;

How we can define the starting point?

What is the difference between LCF_STARTPTR_CPU0 and LCF_STARTPTR_NC_CPU0 ?

thanks in advance
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4 Replies
cwunder
Employee
Employee
25 likes received 25 solutions authored 100 sign-ins
Within AURIX there is only one Program Flash memory however when you address memory segment 8 (0x80000000) it allows cached access to PFlash whereas when you address segment 10 (0xA0000000) it allows non-cached access to PFlash.
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FD_aurix
Level 5
Level 5
100 sign-ins 100 replies posted 5 solutions authored
Hi
Thanks for the reply and sorry for the maybe silly question :-D.

I've tried to read the program present into a demoboard and this file started from 0xA0000000. With this file I'm able to clear/program again the demoboard with Memtool without any warning or error.

Then I've tried to re-compile the same project (or what I suppose to be :-D) downloaded from my infineon. The output file in this case started from 0x80000000 so when I try to download it with memtool I've some warning and I can't continue.

I'm just now looking more on the cached/not cached addressing, probably I've only to select what of the two access I have to use to move the starting point from 8 to A. In any case I've still to figure out why I get the warning messagges with the memtool
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cwunder
Employee
Employee
25 likes received 25 solutions authored 100 sign-ins
Please see section: 6.5.2.2.8 Performing Flash Operations of part 1 of the user's manual. It states
Command cycles shall address the non-cached address range of the Flash (otherwise the data may stay in the cache or could be received by the DMU in an incorrect order).

Memtool will only program addresses in segment 10 (0xAxxxxxxx). You should leave the linker defaults (when starting out), as you still need to enable cache accesses in the CPU for both program and data.
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FD_aurix
Level 5
Level 5
100 sign-ins 100 replies posted 5 solutions authored
Thanks again

If I correctly understood I need to address the not cached part (0xA). Memtool also use only this section. But when I compile the demo project of the evaluation board downloaded from my infineon the code is placed at address 0x8 😕

I think the section is but LCF_STARTPTR_NC_CPU0 seems to be well defined (LCF_STARTPTR_NC_CPU0 = 0xA0000000; )

/*Fixed memory Allocations for _START*/
CORE_ID = GLOBAL ;
SECTIONS
{
.start_tc0 (LCF_STARTPTR_NC_CPU0) : FLAGS(rxl) { KEEP (*(.start)); } > pfls0_nc
.interface_const (0x80000020) : { __IF_CONST = .; KEEP (*(.interface_const)); } > pfls0
PROVIDE(__START0 = LCF_STARTPTR_NC_CPU0);
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU0 = 0); /* Not used */
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU1 = 0);
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU2 = 0);
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU3 = 0);
}
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