Interrupts disabled in QSPI write library function

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User20005
Level 2
Level 2
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Hi,

what is the reason interrupts are disabled in IfxQspi_SpiMaster_write() function? IfxCpu_disableInterrupts() is called at line 926 if DMA is used and 1104 otherwise.

In embedded world we strive to keep critical sections as short as possible. However in this code sample critical section is spanning many tens of lines containing tens of function calls. This seems like extremely unoptimized and potentially dangerous case to me since it is also burried deeply inside of a library.

Can this function in particular be optimized and how? Can we reduce critical section and what is the minimum case that must be contained in a critical section and what code can be left out?

Thanks

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Erick_G
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100 sign-ins 25 solutions authored 50 replies posted

Hi @User20005,

Most of the functions used in this block of code are writes or reads to registers, some of the registers are sensitive by access or are used in an interrupt. It is necessary to disable interrupts for all the block to avoid errors if an interrupt occurs while doing this operation, since the DMA needs to be properly set up for both TX and RX interrupts.

Best regards,

Erick

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Erick_G
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100 sign-ins 25 solutions authored 50 replies posted

Hi @User20005 ,

To clarify, the Infineon Low-Level drivers (iLLD) is for the customer to get started with AURIX, and for then to assess their need and create their own framework. It should not be used for production environments since it is mostly for a better understanding of AURIX functions.

Best regards,

Erick

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Thank you for the response. I am trying to understand what I am missing in
why does the interrupts need to be disabled? Can you help me with that
please. Which part of the code is critical that require interrupts to be
disabled and why?
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Erick_G
Moderator
Moderator
Moderator
100 sign-ins 25 solutions authored 50 replies posted

Hi @User20005,

Most of the functions used in this block of code are writes or reads to registers, some of the registers are sensitive by access or are used in an interrupt. It is necessary to disable interrupts for all the block to avoid errors if an interrupt occurs while doing this operation, since the DMA needs to be properly set up for both TX and RX interrupts.

Best regards,

Erick

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