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AURIX™ Forum Discussions

YogeshK
Level 1
First reply posted First question asked Welcome!
Level 1

Hello Community,

If u r reading this thanks for your time.

I Have below issue case:

Case: In RSTSTAT register EVR33 bit is getting SET sporadically after the Warm Reset ?

  • Already known things: EVR is regulator which is supplies the PFLASH. In case of the under-voltage or Over-voltage detection this bit is expected to getting set.  under-voltage or Over-voltage detection can be done by using the SCU_EVRSTAT register, but in my case there no UVO or OV flag is SET.

Does anybody having the any suggestion, how to debug it further ?

Any idea, hint or clue is appreciated 😊

 

 

 

 

 

 

 

 

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Prudhvi
Moderator
Moderator 10 likes received 100 sign-ins 50 replies posted
Moderator

Hello,

Could you please share the screenshots of RSTSTAT & EVRSTAT register when the issue occurs? Also, could you please let us know which Microcontroller derivative you are using? 

Regards,

Prudhvi.

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YogeshK
Level 1
First reply posted First question asked Welcome!
Level 1

Hello Prudhvi,

Thanks for the reply 🙂

Microcontroller derivative: SAL-TC387QP-160F300S (LFBGA292)

Attached is the Snap .

 

Yogesh K 

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