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Hej,
i am using KIT_A2G_TC397_5V_TFT and the SPI_CPU_1_KIT_TC397_TFT example. Everything runs fine on core0, however if i do switch to core1 and change also the isrProvider to IfxSrc_Tos_cpu1 a trap is being generated.
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found the problem, forgot to change the "vectabNum" to cpu1 in IFX_INTERRUPT, now it works as expected.
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Hello,
From the image where the Trap handling function is shown both the Trap Class and Tin are indicating 8. But in the TC3xx Core Architecture the maximum Trap Class possible is '7' which is NMI. Also, on the left side it is shown as Memory Management Trap.
Could you please check and let us know the right Trap Class and Tin ? Meanwhile, we'll check in our environment by changing the core and provide you the feedback.
Regards,
Prudhvi.
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found the problem, forgot to change the "vectabNum" to cpu1 in IFX_INTERRUPT, now it works as expected.