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Hi Guys,
How to Configure ISR Interrupt For CPU1 in TC297? Is there any example code
Please Share me.
Solved! Go to Solution.
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You need to have the desired TOS configured in that interrupt SRC_xx register. The guidance from dw above is only for the vector table entry.
/* configure QSPI2 Error interrupt to be serviced by CPU0 */
SRC_QSPI2ERR.U = TOS_CPU0 | SRE_ON | SRPN_CPU0_QSPI2_ERR;
If you want it to be serviced by CPU1 then:
/* configure QSPI2 Error interrupt to be serviced by CPU1 */
SRC_QSPI2ERR.U = TOS_CPU1 | SRE_ON | SRPN_CPU0_QSPI2_ERR;
The Interrupt Router TC29x module provides multiple groups of General Purpose Service Requests (GPSR) and a mechanism to trigger multiple Service Requests of a GPSR group in parallel, by software. The GPSR can be used as Software Interrupt.
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IFX_INTERRUPT(isrSTM, 0, ISR_PRIORITY_STM);
/*here 0 is CPU0, and 1 would be CPU1, and so on... */
Dear Users,
About ISR related to CPU0/1/2, I have checked the demo code of TC2XX, and found above code sample for your reference. The notice is that 0/1/2 represents CPU0/1/2.
dw
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Hi,
Actually I tried i changed vector table 0 to 1, but interrupt is not going. It is possible to give vector table 1 in TC297
Because TC297 Architecture is totally different. it seems interrupt module is for only cpu0 but we can give different priority. This all are my analysis .
My question is In TC297 it is possible to give parallel interrupt and will it service to cpu0 and cpu1 parallel?
Thanks
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You need to have the desired TOS configured in that interrupt SRC_xx register. The guidance from dw above is only for the vector table entry.
/* configure QSPI2 Error interrupt to be serviced by CPU0 */
SRC_QSPI2ERR.U = TOS_CPU0 | SRE_ON | SRPN_CPU0_QSPI2_ERR;
If you want it to be serviced by CPU1 then:
/* configure QSPI2 Error interrupt to be serviced by CPU1 */
SRC_QSPI2ERR.U = TOS_CPU1 | SRE_ON | SRPN_CPU0_QSPI2_ERR;
The Interrupt Router TC29x module provides multiple groups of General Purpose Service Requests (GPSR) and a mechanism to trigger multiple Service Requests of a GPSR group in parallel, by software. The GPSR can be used as Software Interrupt.
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Dear user,
I have send an email to you. The register settting is like above cwunder showed already. Another way is to use C function as below:
IfxSrc_init(src, IfxSrc_Tos_cpu0, ISR_PRIORITY_GPT12_T2_INT);
/* Highest priority */
IfxSrc_enable(src);
dw