Announcements

Robots are revolutionizing our lives in many ways. Join our webinar to learn about Infineon’s broad portfolio of robot building blocks.
Click here to register.

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

AURIX™ Forum Discussions

User17612
Level 3
Level 3
First like received
Hi all,

Is the Aurix™ supporting I2S (Inter-IC Sound)?

Best regards,
Lucas.

#8042000 20437
0 Likes
1 Reply
User18237
Level 5
Level 5
First solution authored First like received
Hi Lucas,

The Aurix does not have a dedicated I2S HW-module, but there is the possibilities to emulate I2S master and slave.
Master: For generating an I2S output, where the Aurix is the master the Queued SPI (QSPI) module can be used. To do so use the QSPI in simplex mode transmit mode. You will need two chip selects (SLSO), one for left/right and the second one as a dummy. The chip-select can be switched using the BACON entries.
Slave: In the slave mode the Aurix is responsible to receive the sound signals from an external master. To do so the Timer Input channels (TIM) of the Generic Timer Module (GTM) are used. E.g. TIM_0 is detecting the right or left noise while. TIM_1 is responsible to track the clock and trigger TIM_2 at a rising clock edge. TIM_2 will then track the data and store them through the ARU in the FIFO. By reaching the defined watermark in the FIFO the DMA is triggered to transfer the data to the memory.

Best regards,
Mr. AURIX™
This widget could not be displayed.