# How to understand the register MCi_RANGE in TC377

Level 2
Level 2

Hi,

I'm confused about the register MCi_RANGE. For example, the register MC10_RANGE (for CPU2_DMEM) has a default value of 0xB780, correspondingly, RAEN=0, UPLIMIT=0x6F, LOLIMIT=0x00.

But in memmap we can see the size of CPU2_DMEM is 0x1C000, please tell me the method of translate 0x6F to 0x1C000 or 0x1BFFF.

And if I want to inject an ECC error at address 0x50010000, how to config this register?

What's the means of "limit in 64 word increments" and "UPLIMIT & 111111B"?

Best regards

ASUS

1 Solution

# Re: How to understand the register MCi_RANGE in TC377

Employee
Employee

Hi ASUS.  To get to the underlying math, you need to look in the TC37x variant-specific appendix (TC37x_appx_um_v2.0.pdf).  The table in question is Table 57 SSH instances, which shows this for CPU0_PMEM: Mux factor 8

98304 bytes / (64-bit width for PSPR/PCACHE) / (2 ^ Mux factor 8 ) = 48, which corresponds to RANGE=0x2F

If you want to inject an error at a single address, see 13.3.5.1.7 Writing to a Single Memory Location  in the User Manual.

5 Replies

# Re: How to understand the register MCi_RANGE in TC377

Level 2
Level 2

Hello? I want to know that, pls

# Re: How to understand the register MCi_RANGE in TC377

Level 3
Level 3

Hi,

0x70 * 0x400 = 0x1C000 (112x1024 = 114688)

as
lower limit = 0x0
Upper Limit = 0x6F

Which leads to total of 0x70 KB (112*1024) of size.

BR

# Re: How to understand the register MCi_RANGE in TC377

Level 2
Level 2

Hi,

Thank you for your reply. Could you tell me what is 0x400? It's said 64 word in usermanual, so 1 word is 16 byte?

For another memory, CPU0_PMEM, the default value of UPLIMIT is 0x2F, and the size is 96kbyte, 0x00018000, how to get 0x2F from 0x00018000?

Best Regards

ASUS

# Re: How to understand the register MCi_RANGE in TC377

Moderator
Moderator

Hi,

We reiterate the recommendation from the user manual.

The recommendation is always to do full range tests (i.e. RANGE.RAEN = 1 and RANGE.ADDR = full range). When trying to test a single memory location using the MBIST, the user should read and write using the same settings for the RANGE register.

Best Regards.

# Re: How to understand the register MCi_RANGE in TC377

Employee
Employee

Hi ASUS.  To get to the underlying math, you need to look in the TC37x variant-specific appendix (TC37x_appx_um_v2.0.pdf).  The table in question is Table 57 SSH instances, which shows this for CPU0_PMEM: Mux factor 8

98304 bytes / (64-bit width for PSPR/PCACHE) / (2 ^ Mux factor 8 ) = 48, which corresponds to RANGE=0x2F

If you want to inject an error at a single address, see 13.3.5.1.7 Writing to a Single Memory Location  in the User Manual.