Hi Lucas,
There are three different protection mechanisms:
Access enable protection
Bus Memory Protection Unit (MPU)
CPU MPU
Access enable protection filters peripheral accesses using master tag IDs that masters on the bus have (see On Chip Bus Master TAG Assignments in the user manual).
Bus MPU protects incoming accesses to CPU SRAM via the bus. The mechanism is similar to access enable protection.
CPU MPU gives the option to filter address ranges, here the ranges can be set like memory windows and offer filtering within the complete address range. Here only outgoing accesses from the CPU are filtered.
Kind regards
Mr.AURIX™
