Nov 04, 2019
06:58 AM
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Nov 04, 2019
06:58 AM
Hi all,
How can I measure IPC (Instruction Per Cycle rate) or other useful parameter for my code?
Thank you and best regards,
Christine
#8042000 13272
How can I measure IPC (Instruction Per Cycle rate) or other useful parameter for my code?
Thank you and best regards,
Christine
#8042000 13272
- Tags:
- IFX
3 Replies
Nov 04, 2019
07:44 AM
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Nov 04, 2019
07:44 AM
Hi Christine,
Tricore CPU has a performance counter registers to measure such a useful parameters.
Following code shows a example to measure following parameters,
+ CPU Clock Count
+ Instruction Count
+ Program Cache Hit Count
+ Program Cache Miss Count
Details could be found on AURIX user's manual, Please note that the OCDS must be enabled.
5.8.7 CPU Core Debug and Performance Counter Registers
(sample code)
// Configure Performance counter and make start counting// Configure Performance counter and make start counting// CCTRL.CE=1, .M1=1, .M2=1, .M3=1
__mtcr(CPU_CCTRL, (unsigned int)0x00000126);
// Store counter values before executing target code
clkS = __mfcr(0xFC04); /* read CCNT / instS = __mfcr(0xFC08); / read ICNT */ m1S = __mfcr(0xFC0C); m2S = __mfcr(0xFC10);
// Put your target code to be measured here
int count = 1000000; while ((count--) > 0)
{ // Put Your test code here! // ex. test_main(); __asm__ ("ld.w d0,[a11]0x0 \n"); }
// Read counter values after executing target code
clkE = __mfcr(0xFC04); instE = __mfcr(0xFC08); m1E = __mfcr(0xFC0C); m2E = __mfcr(0xFC10);
// calculation for result
ipc = (instE-instS)/(clkE-clkS); pc_hit = (m1E-m1S)/(instE-instS); pc_miss = (m2E-m2S)/(instE-instS);
Best regards
Mr. AURIX™
Tricore CPU has a performance counter registers to measure such a useful parameters.
Following code shows a example to measure following parameters,
+ CPU Clock Count
+ Instruction Count
+ Program Cache Hit Count
+ Program Cache Miss Count
Details could be found on AURIX user's manual, Please note that the OCDS must be enabled.
5.8.7 CPU Core Debug and Performance Counter Registers
(sample code)
// Configure Performance counter and make start counting// Configure Performance counter and make start counting// CCTRL.CE=1, .M1=1, .M2=1, .M3=1
__mtcr(CPU_CCTRL, (unsigned int)0x00000126);
// Store counter values before executing target code
clkS = __mfcr(0xFC04); /* read CCNT / instS = __mfcr(0xFC08); / read ICNT */ m1S = __mfcr(0xFC0C); m2S = __mfcr(0xFC10);
// Put your target code to be measured here
int count = 1000000; while ((count--) > 0)
{ // Put Your test code here! // ex. test_main(); __asm__ ("ld.w d0,[a11]0x0 \n"); }
// Read counter values after executing target code
clkE = __mfcr(0xFC04); instE = __mfcr(0xFC08); m1E = __mfcr(0xFC0C); m2E = __mfcr(0xFC10);
// calculation for result
ipc = (instE-instS)/(clkE-clkS); pc_hit = (m1E-m1S)/(instE-instS); pc_miss = (m2E-m2S)/(instE-instS);
Best regards
Mr. AURIX™
Oct 13, 2020
06:21 AM
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Oct 13, 2020
06:21 AM
Dear all.
I have interesting this discussion.
I find the topic about IPC - http://www.brendangregg.com/blog/2017-05-04/the-pmcs-of-ec2.html
I'm so much interested in
IPC < 1: likely stall cycle bound, also...
IPC > 1: likely instruction bound. Look to...
These indicator (or idea) can available to AURIX/TriCore ?
thx
I have interesting this discussion.
I find the topic about IPC - http://www.brendangregg.com/blog/2017-05-04/the-pmcs-of-ec2.html
I'm so much interested in
IPC < 1: likely stall cycle bound, also...
IPC > 1: likely instruction bound. Look to...
These indicator (or idea) can available to AURIX/TriCore ?
thx
Oct 13, 2020
07:21 AM
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Oct 13, 2020
07:21 AM
Yes: see the CPU chapter for details. In addition to CPU cycle count and CPU instruction count, these counters are also available: