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User19087
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I know that on a reset, CPU0 is running and CPU1 + CPU2 are disabled (TC277TP). How are CPU1/CPU2 brought online and what are their reset vectors? I can not find it in the documentation.
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cwunder
Employee
Employee
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MuffinFlavored wrote:
I know that on a reset, CPU0 is running and CPU1 + CPU2 are disabled (TC277TP). How are CPU1/CPU2 brought online and what are their reset vectors? I can not find it in the documentation.

The other cores need to be initialized by a core that is already running before that core is enabled so you need some software somewhere.

Are you usings ADS?
Then you can have a look to the file IfxCpu_CStart0.c for the defines IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 and IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 which are by default enabled.
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teoBits
Employee
Employee
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MuffinFlavored wrote:
I know that on a reset, CPU0 is running and CPU1 + CPU2 are disabled (TC277TP). How are CPU1/CPU2 brought online and what are their reset vectors? I can not find it in the documentation.


Hello,

If you created the project with AURIX™ Development Studio, by default the core1 and core2 of your device will be started by the initialization of core0

You can find a code example project that uses multicore here: Multicore training code example.
this example also comes with a tutorial, which can be found here: Multicore tutorial.

Hope it helps,
teoBits
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