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Roger_Florida
Level 3
5 replies posted 5 questions asked 10 sign-ins
Level 3

I have an AURIX TFT eval board with a TC397.  I have been following Chapter 21 of the User Manual part 1 to configure the Extended Memory (EMEM).

I enable the module (IfxEmem_enableModule), then unlock it (IfxEmem_setUnlockMode) then configure the tiles for common memory mode (IfxEmem_setTileConfigMode with mode=IfxEmem_TileConfigMode_commonMemoryMode).

I get a good status back when I check the results:

SBRCTR Register 0x00010001                    STBPON=standby power is enabled, and Unlocked mode 
CLC Register 0x00000000                            EMEM is enabled
TILEECC Register 0x00000000                    Application mode
EMEM_TILESTATE Register 0x00000000   = Common Memory

But if I now try to write to a 32 bit value from the TriCore to a valid address in EMEM, such as address 0x99000000, it immediately goes to a bus error.

Am I not able to use EMEM like normal memory, or am I not using it correctly?  Or maybe there is more configuration that I have missed before I can use it like normal memory?

 

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1 Solution
Roger_Florida
Level 3
5 replies posted 5 questions asked 10 sign-ins
Level 3

I figured it out.  The spec indicates that the error detection needs to be disabled and then the RAM needs to be initialized. Then error detection can be enabled for normal use.  What through me off was the bus error when I expected an ECC error of some kind.

So I add this:

for (i=0; i<IFXEMEM_NUM_MPU_MODULES; i++)
    IfxEmem_disableEccErrorReporting(i);

then init the RAM. I write every 32 bits but the spec says it only needs every 32 bytes.

then I reenable error detection:

for (i=0; i<IFXEMEM_NUM_MPU_MODULES; i++)
    IfxEmem_enableEccErrorReporting(i);

and it now seems to work like normal RAM.

View solution in original post

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1 Reply
Roger_Florida
Level 3
5 replies posted 5 questions asked 10 sign-ins
Level 3

I figured it out.  The spec indicates that the error detection needs to be disabled and then the RAM needs to be initialized. Then error detection can be enabled for normal use.  What through me off was the bus error when I expected an ECC error of some kind.

So I add this:

for (i=0; i<IFXEMEM_NUM_MPU_MODULES; i++)
    IfxEmem_disableEccErrorReporting(i);

then init the RAM. I write every 32 bits but the spec says it only needs every 32 bytes.

then I reenable error detection:

for (i=0; i<IFXEMEM_NUM_MPU_MODULES; i++)
    IfxEmem_enableEccErrorReporting(i);

and it now seems to work like normal RAM.

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