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FD_aurix
Level 5
Level 5
100 sign-ins 100 replies posted 5 solutions authored

Hi all

in GTM documentation there is multiple time a reference to MAX value but is never defined.

 

Someone has an idea?

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Di_W
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 250 solutions authored

Hi FD_aurix,

dw_0-1649063444658.png

You are right,  as below description, if CN0 is reset by the trigger signal from another channel, the MAX should be the trigger channel's max CN0 value which probably be the trigger channel's CM0 (i.e. TOMxCH2 's MAX should be TOMxCH0's CM0 like above picture showed) The purpose is to keep TOMxCH2's period cycle same with TOMxCH0.

______

If the counter register CN0 of channel x is reset by the trigger signal coming from another channel or the assigned TIM module (configured by RST_CCU0=1), following statements are valid:
• CN0 counts from 0 to MAX-1 and is then reset to 0 by trigger signal
• CM0 defines the edge to SL value, CM1 defines the edge to !SL value.
• if CM0=CM1, the output switches to SL if CN0=CM0=CM1 (CM0 has higher priority)
• if CM0=0 and CM1=MAX, the output is SL = 100% duty cycle
• if CM0 > MAX, the output is !SL = 0% duty cycle, independent of CM1

 

dw

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3 Replies
Di_W
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 250 solutions authored

Hi FD,

As CN0 register is 24bit in ATOM architecture, the maximum value should be 16,777,216

dw_0-1648900460221.png

dw

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FD_aurix
Level 5
Level 5
100 sign-ins 100 replies posted 5 solutions authored

Hi

thanks for the answer. I also suppose this but as reported in the last line it should be possible to set CM0> MAX but if it is the maximum value of the register it is not possible!

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Di_W
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 250 solutions authored

Hi FD_aurix,

dw_0-1649063444658.png

You are right,  as below description, if CN0 is reset by the trigger signal from another channel, the MAX should be the trigger channel's max CN0 value which probably be the trigger channel's CM0 (i.e. TOMxCH2 's MAX should be TOMxCH0's CM0 like above picture showed) The purpose is to keep TOMxCH2's period cycle same with TOMxCH0.

______

If the counter register CN0 of channel x is reset by the trigger signal coming from another channel or the assigned TIM module (configured by RST_CCU0=1), following statements are valid:
• CN0 counts from 0 to MAX-1 and is then reset to 0 by trigger signal
• CM0 defines the edge to SL value, CM1 defines the edge to !SL value.
• if CM0=CM1, the output switches to SL if CN0=CM0=CM1 (CM0 has higher priority)
• if CM0=0 and CM1=MAX, the output is SL = 100% duty cycle
• if CM0 > MAX, the output is !SL = 0% duty cycle, independent of CM1

 

dw

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