GTM Register protection Access mode

[FD_aurix]

Hi All

Where I can find the register protection access mode referred to the GTM registers?

ON Table 159 of the user manual this column is missing while on the other peripheral (e.g. Table 231 for GPT12) is usually present.

[µC_Wrangler]

Hi FD_aurix.  All GTM registers have the default protection (SV required).   Only GTM_ACCEN0 and GTM_ACCEN1 have ENDINIT protection.

[FD_aurix · Accepted solution]

Thanks again for your support!

Yesterday I've found the table in the documentation (appendix  manual of the derivative).