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Kevingiordano14
Level 2
Level 2
50 sign-ins 10 questions asked 10 replies posted

Hello everyone.
I am using a Tricore TC39 and I am studying the GTM's ATOM module to be able to generate 4 PWM signals of period 10 micro seconds via 4 channels of the TOM. In my case, I have to create a programme that is able to update the duty cycles of the 4 PWMs in less than 8 micro seconds.

The problem is that to update the duty cycles I have to execute these instructions:

g_tomConfig1.dutyCycle=(uint16)(PWM_period*d_01);

g_tomConfig2.dutyCycle=(uint16)(PWM_period*d_02);

g_tomConfig3.dutyCycle=(uint16)(PWM_period*d_03);

g_tomConfig4.dutyCycle=(uint16)(PWM_period*d_04);

IfxGtm_Tom_Pwm_init(&g_tomDriver1, &g_tomConfig1);

IfxGtm_Tom_Pwm_init(&g_tomDriver2, &g_tomConfig2);

IfxGtm_Tom_Pwm_init(&g_tomDriver3, &g_tomConfig3);

IfxGtm_Tom_Pwm_init(&g_tomDriver4, &g_tomConfig4);

Analysing the execution times of the functions, the bottle neck is due to the 4 functions IfxGtm_Tom_Pwm_init, which have a total execution time of 13.9 micro seconds. I wanted to know from you if it is possible to update PWMs in an alternative way that takes less time.

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12 Replies
oldPcSpeakers
Level 4
Level 4
5 solutions authored 25 sign-ins 10 replies posted

Isn't the initialization usually done only once for example during the device startup, before the timers are even started, before PWM starts being generated because initializing them over and over could even break synchronization/ timings of PWM signals under such strict time limits. And then you let's say connect "reference" timer channel so that interrupt trigger is synchronized to start  interrupt at the beginning of the period. In this interrupt you only need to calculate duty cycles and pass them to the shadow registers which automatically update duty cycle of the timer comparators at the start of the next period. This way PWM calculations will probably be done much faster.

There are examples on how to do this buried deep down in iLLD but GTM configuration is quite complex to achieve such functionality. If your application is more simple/does not need such complex connectivity usually used for applications like complex motor control (for which examples also exists I believe) then you could try also with much easier to understand CCU6 or GPT12 module.

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I based it on the GTM_ATOM_PWM_1_KIT_TC397_TFT code, and saw that every time it has to update the duty cycle, in addition to writing it into the g_atomConfig structure, it also executes the re-initialisation function, i.e. IfxGtm_Atom_Pwm_init

In my case, I would like to use the GTM because my goal is to control a DCDC by generating 8 PWMs (4 of which are inverse).
I would like to try writing directly to the shadow register SR1 to set the new duty cycle to the next period; however, when I tried writing directly to that register it gave me an error because I did not have permission to write directly to the register.

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Hello @Kevingiordano14 , I would recommend you to use new PWM APIs from IfxGtm_Pwm.h. You can use following APIs:

  1. IfxGtm_Pwm_initConfig() - modifiy default config to fit to your needs
  2. IfxGtm_enable()
  3. IfxGtm_Cmu_setGclkFrequency()
  4. IfxGtm_Cmu_setClkFrequency()
  5. IfxGtm_Cmu_enableClocks()
  6. IfxGtm_Pwm_init()

To update duty cycles you can use IfxGtm_Pwm_updateChannelsDutyImmediate() and to update phase shift btw. channels IfxGtm_Pwm_updateChannelsPhase()

I would recomend you to configure 5 ATOM channels if you would like to acheive bi-directional power flow. The first channel will be used as a master and all other channels as slaves. If you want to enable sync, then keep this config  .syncUpdateEnabled = TRUE and .syncStart = TRUE.

Best regards

GMCTRL 

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I would argue that with only 5(4) channels used you would need to use some additional components like DTM module to achieve 8 channels, or even some external driver that inverts non-inverted signal. And also IfxGtm_Pwm_updateChannelsDutyImmediate() does not update channels synchronously by default so why not use function which does it synchronously always (IfxGtm_Pwm_updateChannelDuty vs IfxGtm_Pwm_updateChannelDutyImmediate + some possibility that it doesn't update synchronously).

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hello @gmctrl , thank you for your reply.

Have you used this library before?

I'm having problems with the initialisation of ATOM.
I have already created the IfxGtm_Pwm_Config pwm_config and IfxGtm_Pwm_ChannelConfig pwm_channel structures. I have also used the two functions:

IfxGtm_Pwm_initConfig and IfxGtm_Pwm_initChannelConfig,

and after that I have to modify the pwm_channel structure to configure the output pin. It is precisely at this point that I am experiencing problems. I can't figure out how to set the output pins, in detail, I don't know how to assign the pins using the following instruction:

pwm_channel.output = .....

the "output" object belongs to the IfxGtm_Pwm_OutputConfig structure, which is internally composed as follows:

typedef struct

{

IfxGtm_Pwm_ToutMap *pin; /**< \brief Output pin configuration */

IfxGtm_Pwm_ToutMap *complementaryPin; /**< \brief Complementary output pin configuration (_N) */

Ifx_ActiveState polarity; /**< \brief Active low/high of pin */

Ifx_ActiveState complementaryPolarity; /**< \brief Active low/high of complementary pin */

IfxPort_OutputMode outputMode; /**< \brief Output mode */

IfxPort_PadDriver padDriver; /**< \brief Pad driver */

} IfxGtm_Pwm_OutputConfig;

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@oldPcSpeakers correct, in this case DTM module needs to be used. By using DTM 8 PWM signals can be generated based on signals from 4 (A)TOM channels.

@Kevingiordano14 For exampple, you can define PWM and PWMN as follows:

#define PWM &IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
#define PWMN &IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

and then use them in output configuration:

output.pin = (IfxGtm_Pwm_ToutMap*)PWM;
output.complementaryPin = (IfxGtm_Pwm_ToutMap*)PWMN;
output.polarity = Ifx_ActiveState_high;
output.complementaryPolarity = Ifx_ActiveState_low;
output.outputMode = IfxPort_OutputMode_pushPull;
output.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;

Don't forget to configure which sub-module you are using:

config.subModule = IfxGtm_Pwm_SubModule_atom; 

You may configure rising and falling dead-time as well...

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@gmctrl  I already tried this configuration yesterday, but if I write output.pin it tells me:
"Field 'pin' could not be resolved
I get the same result with the other elements of the output structure, so even if I try to write output.polarity etc., I get the same result. 

Below is the definition of the structures I used:

 

typedef struct

{

IfxGtm_Pwm_SubModule_Ch timerCh; /**< \brief Channel Index */

float32 phase; /**< \brief Initial phase in radians (range: 0.0 .. 2pi; only for edge aligned sync channels) */

float32 duty; /**< \brief PWM duty in % (range: 0.0 .. 100.0) */

IfxGtm_Pwm_DtmConfig *dtm; /**< \brief Dead time configuration for this channel */

IfxGtm_Pwm_OutputConfig *output; /**< \brief Pin connections and polarities for this channel */

IfxGtm_Trig_MscOut *mscOut; /**< \brief MSC Output configuration */

IfxGtm_Pwm_InterruptConfig *interrupt; /**< \brief Interrupt configuration for this channel */

} IfxGtm_Pwm_ChannelConfig;

 

typedef struct

{

IfxGtm_Pwm_ToutMap *pin; /**< \brief Output pin configuration */

IfxGtm_Pwm_ToutMap *complementaryPin; /**< \brief Complementary output pin configuration (_N) */

Ifx_ActiveState polarity; /**< \brief Active low/high of pin */

Ifx_ActiveState complementaryPolarity; /**< \brief Active low/high of complementary pin */

IfxPort_OutputMode outputMode; /**< \brief Output mode */

IfxPort_PadDriver padDriver; /**< \brief Pad driver */

} IfxGtm_Pwm_OutputConfig;

do you have any suggestions for using these structures?

 

 

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I suggest you to search it in iLLD. subModule member is from IfxGtm_Pwm_Config struct type definition and for output you can see it matches the second struct type definition you pasted (IfxGtm_Pwm_OutputConfig). However this is only small amount of the configuration needed to get things going. And you have to of course define them correctly. Output or config is just a name that @gmctrl defined probably within a specific project it is not part of iLLD. In iLLD this type is for example used with variable name defaultConfig. but you could modify/rename it. Only you have to be aware that then it is harder to share it or reference it to iLLD like already done here, besides all other complexities already present regarding this device module.

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gmctrl
Level 1
Level 1
5 replies posted 10 sign-ins First reply posted

Hello @Kevingiordano14 , recently several code examples were published by Infineon, see screenshot. Maybe, you can check them.

gmctrl_0-1708460415451.png

BR

 

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oldPcSpeakers
Level 4
Level 4
5 solutions authored 25 sign-ins 10 replies posted

Again GTM is very complex module and simply trying to figure out on your own how to configure it is difficult, I suggest you to check either motor control kit as an example how to control 6 (3 invertede) channels, check MyICP if you get any application notes which could be at least somehow related or contact Infineon support to ask them if you can get any documentation with code example on how to do this. As per my knowledge iLLD is in the end used with some special functions just for this and if you are willing to study it by yourself you can find the solution. TOM (or ATOM) module has groups of 8 channels controlled together as far as I remember. But there could be already one catch that you need to use one of the channels just to trigger interrupt to do calculation if you want to be sure that this calculation is done synchronously on every PWM period start or middle (or actually on any moment) of the period (depending on edge, center,... aligned PWM signals) so you would need 9 channels (1 from additional group for example or use some other distribution between groups), but if I remember correctly there is mechanism to synchronize those groups. And so on....

Since you mention writing to SR registers did not succeed I would suggest you to check IfxGtm_Tom_PwmHl_updateCenterAligned or IfxGtm_Tom_PwmHl_updateEdgeAligned which both use IfxGtm_Tom_Ch_setCompareShadow multiple times (you can see that this happens also because of some interesting comments regarding GTM module which makes the whole thing even more complex). And here channels are controlled in pairs which is useful for your use case. I remembered that also TGC is involved to do "Update enable of the register CM0, CM1 and CLK_SRC for each TOM channel with the control bit field UPEN_CTRL[z] of TOM[i]_TGC[y]_GLB_CTRL". Since I don't remember by heart I guess this is done by IfxGtm_Tom_Timer_applyUpdate or some other TGC related function. And in general check that TBU, TGC, TOM channel and all needed sub modules/units/... are initialized and used correctly. But again this topic is very complex since GTM could almost be a device on its own so I suggest to get some decent example as close to your application as possible and well documented (together with device documentation) to understand it.

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thank you very much @oldPcSpeakers .
These days I will study the codes you sent me and i'll let you know.

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