Flash operations on PF1 by Core1 when code is executed on PF0 and PF1 by Core0

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hmkum
Level 2
Level 2
10 replies posted 5 replies posted 5 questions asked
Hello,

As described in title, our code is executed on PF0 and PF1 by Core0, we want to write data to PF1 using Core1. If there is no Flash operation (program/erase) by Core0, Core1 can write to the PF1. Is this correct? Do we need extra steps to activate this feature if previous question is yes?

We found this thread, we guess this is doable but we just want to confirm this.
https://www.infineonforums.com/threads/11078-What-happens-when-reading-and-flash-operation-conflict

We are using TC366
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3 Replies
Darren_Galpin
Employee
Employee
First solution authored First like received
You understand correctly - Core 1 can write to PF1 as long as there is no access or operation in progress on PF1, and as long as there is no program/erase to another PFlash ongoing.
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
Don't forget these often-missed other things that might access PFLASH, depending on your application:
- DMA Transaction Control Sets loaded from PFLASH
- Hardware Security Module's Cortex M3 CPU
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hmkum
Level 2
Level 2
10 replies posted 5 replies posted 5 questions asked
Thank you for your replies.
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